Fujitsu FR81S User Manual
CHAPTER 17: PPG
4. Registers
FUJITSU SEMICONDUCTOR LIMITED
CHAPTER
: PPG
FUJITSU SEMICONDUCTOR CONFIDENTIAL
33
4.14. GATE Function Control Register : GATEC0, GATEC2,
GATEC4
The bit configuration of the GATE function control register is shown.
The GATE function control register (GATEC) controls the operation of the GATE function.
GATE function control register (GATEC): Address 19DD
H
, 19DF
H
, 19E1
H
(Access: Byte, Half-word, Word)
bit7
bit6
bit5
bit4
bit3
bit2
bit1
bit0
Reserved Reserved Reserved Reserved Reserved Reserved
STGR
EDGE
Initial value
0
0
0
0
0
0
0
0
Attribute R0/W0
R0/W0
R0/W0
R0/W0
R0/W0
R0/W0
R/W
R/W
[bit7 to bit2] Reserved bits
⋅
The reading value of these bits is always "0".
⋅
These bits must always be written to "0".
[bit1] STGR : GATE function selection bit
STGR
Explanation
0
PPG is activated by the activation trigger.
1
PPG is activated and stoped according to the GATE signal from a waveform generator.
[bit0] EDGE : GATE function activation effective edge selection bit
EDGE
Explanation
0
PPG is activated by the rising of the GATE signals, and stopped by the falling.
PPG activates during "H".
1
PPG is activated by the falling of the GATE signals, and stopped by the rising.
PPG activates during "L".
Note:
Be sure to set GATE function control register (GATEC) before activating PPG. Please change neither the
GATE selection bit (STGR) nor polarity selection bit (EDGE) of the GATE function control register
(GATEC) during the PPG operation.
MB91520 Series
MN705-00010-1v0-E
574