Fujitsu FR81S User Manual
CHAPTER 17: PPG
5. Operation
FUJITSU SEMICONDUCTOR LIMITED
CHAPTER
: PPG
FUJITSU SEMICONDUCTOR CONFIDENTIAL
62
5.13. PPG Output Pulse Polarity Selection
The PPG output pulse polarity selection is explained.
The PPG waveform can be output from the High pulse by writing "1" in the High/Low format pulse polarity
selection register (HFPR/LFPR). (Output from the Low pulse in "0" setting.)
Figure 5-15 Example of PPG Communication Mode Operation (Output Pulse Selection Mode
"1" Setting)
Activation trigger
PHCSR
A
PLCSR
B
Down count value
(PTMR)
(PTMR)
A
D
C
PPG pin output
Normal polarity
Inverted polarity
CMD
(1) cycle setting
(6) PPG communication mode enable
(8) Activation trigger
(9) Load
PHDUT
C
PLDUT
D
PCMDDT
B
(10) down count
(11) match
(12) inversion
(13) down count
(14) borrow
(15) clear
(16) Load
(17)
(19)
PCMDWD
4h (0100)
PPG output counter
4
3
2
1
0
1F
1F
Shift register
(PCMDDT)
(PCMDDT)
Register Empty flag
(REMP)
(REMP)
Shift register Empty flag
(SREMP)
(SREMP)
(2) duty setting
(4) PPG communication mode data width
(5) PPG communication mode data
(7) transmit for shift register
14h (0001_0100)
14h (0001_0100)
HFPR
'H'=inversion
(3) pulse polarity select
LFPR
'H'=inversion
※1
High format cycle
※2
Low format cycle
※1 : High format duty
※2 : Low format duty
※2 : Low format duty
MB91520 Series
MN705-00010-1v0-E
603