Fujitsu FR81S User Manual
CHAPTER 17: PPG
6. Notes
FUJITSU SEMICONDUCTOR LIMITED
CHAPTER
: PPG
FUJITSU SEMICONDUCTOR CONFIDENTIAL
67
Start Delay Function
16. To activate the Start Delay mode, the timer operation enable bit (PCN:CNTE) and the Start Delay mode
enable (STRD) must be set to "1" before or when PPG operation is enabled (activated).
17. When the Start Delay value (PSDR) is rewritten during the PPG operation in the Start Delay mode, the
Start Delay value becomes effective after prohibiting operating once and generating the activation trigger.
(The Start Delay value becomes effective with the activation trigger.)
18. The Start Delay setting period (PSDR) is waited again when the restart request is generated during the
Start Delay operation (waiting time period). Moreover, the PPG waveform output is stopped and the Start
Delay setting period is waited again when the restart is requested while outputting PPG waveform by the
Start Delay mode enable (STRD)="1".
19. When the Start Delay mode enable (STRD) is set to "1", the Start Delay value cannot be set to "0". (A
minimum setting of the Start Delay value is "1") Be sure to set the Start Delay mode enable (STRD) to "0"
If the delay value is set to "0",
20. Be sure to prohibit operating once when "0" is written in the Start Delay mode enable (STRD) during
the Start Delay period. Moreover, if the activation trigger is not generated, the Start Delay mode disable
(STRD=0) does not become effective.
21. If the timer operation enable bit (PCN:CNTE) is set to "0" to disable the PPG during the Start Delay
mode period, the PPG stops with its state (count and output level) maintained. (Refer to 5th particular of "6.
Notes" for the return method.)
Timing Point Capture Function
22. The Timing Point Capture value setting (PTPC) has to set smaller than the cycle value (PCSR). When
the value that is larger than cycle value (PCSR) is set, the A/D activation trigger or the Timing Point
Capture match interrupt is not generated.
23. When the Start Delay mode enable (STRD) = "1" and the Timing Point Capture mode enable (TPC) = is
set "1", neither the interrupt nor the A/D activation trigger by the Timing Point Capture value match during
the Start Delay (waiting) are generated.
24. The value becomes effective at the next cycle after rewriting when the Timing Point Capture value
(PTPC) is rewritten during the PPG operation.
25. When "0" is written in the Timing Point Capture mode enable (TPC) during the PPG operation, neither
the interrupt by the Timing Point Capture value match nor the A/D activation trigger is generated. Be sure to
set the setting according to the procedure when Timing Point Capture mode enable (TPC) is set again.
PPG Communication Mode Function
26. The activation of the PPG communication starts the PPG communication by setting the PPG
communication enable (CMD), the cycle setting (PHCDR/PLCSR), the duty setting (PHDUT/PLDUT), the
PPG communication mode data (PCMDDT), and the PPG communication data bit length (PCMDWD), and
then set the activation trigger at the end.
Be sure to write the setting in the register when the PPG communication is activated.
(Similar when GATE function is used)
MB91520 Series
MN705-00010-1v0-E
608