Fujitsu FR81S User Manual
CHAPTER 20: RELOAD TIMER
6. Application Note
FUJITSU SEMICONDUCTOR LIMITED
CHAPTER : RELOAD TIMER
FUJITSU SEMICONDUCTOR CONFIDENTIAL
FUJITSU SEMICONDUCTOR CONFIDENTIAL
57
6.2. Reload Timer
The reload time is shown below.
The reload timer loads from the TMRLRA register onto the counter and repeats the down count operation
each time underflow occurs. The TOUT outputs the "L level" while the count is going on from the
activation trigger to the occurrence of the first underflow, then the output will be inverted to the "H level" at
the timing of the occurrence of the first underflow, inverting the outputs whenever an underflow occurs.
When a retrigger occurs, TOUT output returns to its initial value. (When OUTL=0)
each time underflow occurs. The TOUT outputs the "L level" while the count is going on from the
activation trigger to the occurrence of the first underflow, then the output will be inverted to the "H level" at
the timing of the occurrence of the first underflow, inverting the outputs whenever an underflow occurs.
When a retrigger occurs, TOUT output returns to its initial value. (When OUTL=0)
[Configuration] To use the timer as the reload timer, configure as follows.
1. When TIN input is not used
TMCSR
TMRLRA
MOD
[1:0]
TRGM
[1:0]
CSL
[2:0]
GATE EF OUTL RELD INTE
UF
CNTE TRG
Count initial value
setting
00
00
*1
0
-
*2
1
*3
-
1
S
S :Use at timer activation
-:Does not influence operation
*1:Count clock division setting
-:Does not influence operation
*1:Count clock division setting
CSL[2:0]= 000------Division of peripheral clock (PCLK) by 2
CSL[2:0]= 010------Division of peripheral clock (PCLK) by 8
CSL[2:0]= 011------Division of peripheral clock (PCLK) by 16
CSL[2:0]= 100------Division of peripheral clock (PCLK) by 32
CSL[2:0]= 101------Division of peripheral clock (PCLK) by 64
*2:TOUT output polarity setting
OUTL=0------Initial value L=> Count starts L=> Invert whenever an underflow occurs
OUTL=1------Initial value H=> Count starts H=> Invert whenever an underflow occurs
*3:Interrupt request enable setting
INTE=0------Interrupt disabled
INTE=1------Interrupt enabled
MB91520 Series
MN705-00010-1v0-E
784