Fujitsu FR81S User Manual
CHAPTER 21: 32-BIT FREE-RUN TIMER
7. Q&A
FUJITSU SEMICONDUCTOR LIMITED
CHAPTER
: 32-BIT FREE-RUN TIMER
FUJITSU SEMICONDUCTOR CONFIDENTIAL
40
7.6. How to Enable Compare Clear Interrupt?
This section shows how to enable compare clear interrupt.
Enable interrupt request, interrupt request flag
Interrupt enable setting can be performed using interrupt request enable bits (TCCSn.ICRE [n=3 to 5]).
Operation
Compare clear interrupt request enable bit (ICRE)
Interrupt disabled
Set "0".
Interrupt enabled
Set "1".
Clearing of the interrupt request can be configured using interrupt flag bits (TCCSn.ICLR [n=3 to 5]).
Operation
Compare clear interrupt flag bit (ICLR)
Interrupt request clear
Write "0".
MB91520 Series
MN705-00010-1v0-E
835