Fujitsu FR81S User Manual
CHAPTER 22: 32-BIT OUTPUT COMPARE
2. Features
FUJITSU SEMICONDUCTOR LIMITED
CHAPTER
: 32-BIT OUTPUT COMPARE
FUJITSU SEMICONDUCTOR CONFIDENTIAL
5
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Type : 32-bit compare register × 4 + compare circuit
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Corresponding timer : Free-run timer is used
Number : 6 channels
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Operation by compare match
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Pin output value invert (toggle output) or signal output of H/L level specified
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Interrupt occurrence
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Count accuracy : Peripheral clock (PCLK/2, PCLK/4, PCLK/8, PCLK/16, PCLK/32, PCLK/64,
PCLK/128, PCLK/256) (Dependent on the free-run timer)
Note:
The setting of the peripheral clock (PCLK) divided by 1 is prohibited.
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Toggle change width (T): 1 × count accuracy to 100000000
H
× count accuracy
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Interrupt : Compare match interrupt
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Others :
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Output level initial value setting is enabled. ("H"/"L")
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Unused pins as OCU output can be used as general-purpose ports.
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6 compare registers can be used for independence.
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Output pins and interrupt flags correspond to the compare register.
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Output pins can be inverted with the use of two compare registers. (Function only for OCU7, 9 and
11)
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The initial value of each output pin can be set.
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When the output compare register matches the 32-bit free-run timer, an interrupt can be generated.
MB91520 Series
MN705-00010-1v0-E
842