Fujitsu FR81S User Manual
CHAPTER 24: 16-BIT FREE-RUN TIMER
4. Registers
FUJITSU SEMICONDUCTOR LIMITED
CHAPTER : 16-BIT FREE-RUN TIMER
FUJITSU SEMICONDUCTOR CONFIDENTIAL
21
[bit20] SCLR: Timer clear bit
SCLR
Function
Read
Write
0
"0" is always read out.
Counter will not be initialized.
1
Counter will be initialized to "0000
H
".
⋅
This bit is used to initialize the 16-bit free-run timer to "0000
H
".
⋅
Initialization of the 16-bit free-run timer:
When this bit is set to "1" while the 16-bit free-run timer is active (STOP: bit22 of the timer state control
register (TCCS) is 0), the 16-bit free-run timer will be initialized to "0000
H
" in the next count clock. The
16-bit free-run timer will not be initialized when this bit is set to "1" while the 16-bit free-run timer is
inactive (STOP: bit22 of the timer state control register (TCCS) is 1).
⋅
The value read out is always "0".
⋅
The value to be reflected to this bit is the one specified at the GSTOP bit of the timer synchronous
activation register (TCGS) while the FRT bit of the timer synchronous activation enable register (TCGSE)
is set to "1".
Note:
Writing "1" to this bit will not generate the 0 detection interrupt.
If you write "0" to this bit prior to the next count clock after setting "1", the timer clear will not be executed.
[bit19 to bit16] CLK3 to CLK0 : Clock frequency selection bits
CLK3 CLK2 CLK1 CLK0
Function
Count
Clock
φ
=40MHz φ=20MHz φ=10MHz φ=5MHz
φ
=2.5MHz
0
0
0
0
φ
25ns
50ns
100ns
200ns
400ns
0
0
0
1
φ
/2
50ns
100ns
200ns
400ns
800ns
0
0
1
0
φ
/4
100ns
200ns
400ns
800ns
1.6µs
0
0
1
1
φ
/8
200ns
400ns
800ns
1.6µs
3.2µs
0
1
0
0
φ
/16
400ns
800ns
1.6µs
3.2µs
6.4µs
0
1
0
1
φ
/32
800ns
1.6µs
3.2µs
6.4µs
12.8µs
0
1
1
0
φ
/64
1.6µs
3.2µs
6.4µs
12.8µs
25.6µs
0
1
1
1
φ
/128
3.2µs
6.4µs
12.8µs
25.6µs
51.2µs
1
0
0
0
φ
/256
6.4µs
12.8µs
25.6µs
51.2µs
102.4µs
Other settings disabled
-
-
-
-
-
-
⋅
These bits are used to select the count clock frequency of the 16-bit free-run timer.
Note:
When setting CLK3 to CLK0 bits, confirm that the free-run timer stops firmly.
[bit15 to bit12] Reserved
Always write 0 to these bits.
MB91520 Series
MN705-00010-1v0-E
928