Fujitsu FR81S User Manual
CHAPTER 36: EXTERNAL BUS INTERFACE
4. Registers
FUJITSU SEMICONDUCTOR LIMITED
CHAPTER : EXTERNAL BUS INTERFACE
FUJITSU SEMICONDUCTOR CONFIDENTIAL
17
4.4. External DMA Transfer Registers: DMAR0-3 (DMA
transfer Register 0-3)
The bit configuration of the external DMA transfer registers is shown below.
These registers set the external pins for DMA transfers. This function is not supported by this series.
DMAR0 : Address 06C0
H
(Access : Word)
DMAR1 : Address 06C4
H
(Access : Word)
DMAR2 : Address 06C8
H
(Access : Word)
DMAR3 : Address 06CC
H
(Access : Word)
bit31
bit30
bit29
bit28
bit27
bit26
bit25
bit24
Reserved
Initial value
*
*
*
*
*
*
*
*
Attribute
R0,W0
R0,W0
R0,W0
R0,W0
R0,W0
R0,W0
R0,W0
R0,W0
bit15
bit14
bit13
bit12
bit11
bit10
bit9
bit8
Reserved
Initial value
*
*
*
*
*
*
*
*
Attribute
R0,W0
R0,W0
R0,W0
R0,W0
R0,W0
R0,W0
R0,W0
R0,W0
bit15
bit14
bit13
bit12
bit11
bit10
bit9
bit8
Reserved
Initial value
*
*
*
*
*
*
*
*
Attribute
R0,W0
R0,W0
R0,W0
R0,W0
R0,W0
R0,W0
R0,W0
R0,W0
bit7
bit6
bit5
bit4
bit3
bit2
bit1
bit0
Reserved
REQL
ACKMD
ACKL
EOPL
Initial value
*
*
*
*
0
0
0
0
Attribute
R0,W0
R0,W0
R0,W0
R0,W0
R/W0
R/W0
R/W0
R/W0
* [Initial value] 0000_0000_0000_0000_0000_0000_0000_0000
B
[bit31 to bit4] Reserved
Always write "0" to these bits.
[bit3] REQL
When writing, always write "0" to this bit.
[bit2] ACKMD
When writing, always write "0" to this bit.
MB91520 Series
MN705-00010-1v0-E
1216