Fujitsu FR81S User Manual
CHAPTER 19: BASE TIMER
5. Operation
FUJITSU SEMICONDUCTOR LIMITED
CHAPTER
: BASE TIMER
FUJITSU SEMICONDUCTOR CONFIDENTIAL
45
5.3.2. 32-bit Mode Setting
This section explains the 32-bit mode setting.
First, set "000" to the FMD bits of the BTxTMCR register of the even-number channel to reset to the reset
mode, then select the reload timer or PWC timer and set the operation as in the 16-bit mode. While doing so,
set to the 32-bit mode by writing "1" to the T32 bit of the BTxTMCR register. Leave the T32 bit of the
odd-number channel "0". You do not have to set the reset mode. For the reload timer, set the upper 16-bit
reload values of the 32-bit to the cycle setting register of the odd-number channel, then set the lower 16-bit
reload values to the cycle setting register of the even-number channel.
The transition to the 32-bit mode is reflected immediately after the writing to the T32 bit. Thus, setting change
for both channels must be done when the counting is stopped.
To transit from the 32-bit mode to the 16-bit mode, set "000" to the FMD bits of the BTxTMCR register of the
even-number channel to reset to the reset mode for both the even-number and odd-number channels, and
make a setting in the 16-bit mode for each channel.
MB91520 Series
MN705-00010-1v0-E
678