Intel 8XC251SQ User Manual
8XC251SA, SB, SP, SQ USER’S MANUAL
13-24
13.8.4 Example 4: RD1:0 = 10, 16-bit Bus, External RAM
In this example, an 87C251SB/83C251SB operates in nonpage mode with a 16-bit external ad-
dress bus interfaced to 64 Kbytes of RAM (Figure 13-23). This configuration leaves
P3.7/RD#/A16 available for general I/O (RD1:0 = 10). A maximum of 64 Kbytes of external
memory can be used and all regions of internal memory map into the single 64-Kbyte region in
external memory (see Figure 4-6 on page 4-11). User code is stored in on-chip ROM/OT-
PROM/EPROM.
dress bus interfaced to 64 Kbytes of RAM (Figure 13-23). This configuration leaves
P3.7/RD#/A16 available for general I/O (RD1:0 = 10). A maximum of 64 Kbytes of external
memory can be used and all regions of internal memory map into the single 64-Kbyte region in
external memory (see Figure 4-6 on page 4-11). User code is stored in on-chip ROM/OT-
PROM/EPROM.
Figure 13-23. Bus Diagram for Example 4: 87C251SB/83C251SB in Nonpage Mode
PSEN#
A4221-01
WR#
D7:0
A15:8
A7:0
OE#
WE#
P2
P0
83C251SB
87C251SB
87C251SB
RAM
(64 Kbytes)
CE#
EA#
V
CC
Latch