Intel PCI User Manual
368
Software Developer’s Manual
Register Descriptions
Table 13-149. TDFHS Register Bit Description
13.8.9
Transmit Data FIFO Tail Saved Register
TDFTS (03428h; R/W)
This register stores a copy of the Transmit Data FIFO Tail register in case the internal register
needs to be restored. This register is available for diagnostic purposes only, and should not be
needs to be restored. This register is available for diagnostic purposes only, and should not be
written during normal operation.
Table 13-150. TDFTS Register Bit Description
13.8.10
Transmit Data FIFO Packet Count
TDFPC (03430h; R/W)
This register reflects the number of packets to be transmitted that are currently in the Transmit
FIFO. This register is available for diagnostic purposes only, and should not be written during
FIFO. This register is available for diagnostic purposes only, and should not be written during
normal operation.
31
13 12
0
Reserved
FIFO Head
Field
Bit(s)
Initial
Value
Value
Description
FIFO Head
12:0
0b
A “saved” value of the Transmit FIFO Head pointer.
Reserved
31:13
0b
Reads as 0b. Should be written to 0b for future compatibility.
31
13 12
0
Reserved
FIFO Tail
Field
Bit(s)
Initial
Value
Value
Description
FIFO Tail
12:0
0b
A “saved” value of the Transmit FIFO Tail pointer.
Reserved
31:13
0b
Reads as 0b. Should be written to 0b for future compatibility.