Renesas R5S72621 User Manual
Section 21 IEBus
TM
Controller
R01UH0134EJ0400 Rev. 4.00
Page 1105 of 2108
Sep 24, 2014
SH7262 Group, SH7264 Group
Bit Bit
Name
Initial
Value R/W Description
Value R/W Description
4
0
R
Reserved
This bit is always read as 0. The write value should
always be 0.
always be 0.
3 RE 0 R/W
Receive
Enable
Enables/disables reception. This bit must be set at the
initial setting before frame reception.
initial setting before frame reception.
0: Reception is disabled.
1: Reception is enabled.
2 to 0
All
0
R
Reserved
These bits are always read as 0. The write value should
always be 0.
always be 0.
21.3.2
IEBus Command Register (IECMR)
IECMR issues commands to control communications. Since this register is a write-only register,
the read value is undefined.
the read value is undefined.
7
6
5
4
3
2
1
0
0
0
0
0
0
0
0
0
-
-
-
-
-
W
W
W
Bit:
Initial value:
R/W:
-
-
-
-
-
CMD
Bit Bit
Name
Initial
Value R/W Description
Value R/W Description
7 to 3
All
0
Reserved
These bits are always read as 0. The write value should
always be 0.
always be 0.