Renesas R5S72621 User Manual

 

Section 34   User Debugging Interface 

R01UH0134EJ0400  Rev. 4.00  

 

Page 1819 of 2108 

Sep 24, 2014 

 

 

 
SH7262 Group, SH7264 Group 

Section 34   User Debugging Interface 

This LSI incorporates a user debugging interface for emulator support. 

The user debugging interface is a serial input/output interface that supports JTAG-standard, IEEE 
Std.1149.1. 

This module incorporates a TAP controller for controlling the user debugging interface interrupt 
function. When the emulation enable command is input, emulation commands become available. 
When the 

TRST pin is asserted, emulation commands are disabled. 

In ASE mode, emulation commands are available. For connection with the emulator, see the 
manual for the emulator. 

Figure 34.1 shows a block diagram. 

Bypass register
Instruction register
Enable register

[Legend]

SDBPR:
SDIR:
SDENR:

SDIR

SDENR

TCK

TDO

TDI

TMS

TRST

SDBPR

MUX

Shift re

g

ister

TAP controller

Decoder

Local 

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