Renesas R5S72621 User Manual
Section 14 Realtime Clock
R01UH0134EJ0400 Rev. 4.00
Page 679 of 2108
Sep 24, 2014
SH7262 Group, SH7264 Group
Bit Bit
Name
Initial
Value R/W
Value R/W
Description
7
0 R
Reserved
This bit is always read as 0. The write value should
always be 0.
6
1 Hz
Undefined R
Indicate the state of the divider circuit between
64 Hz and 1 Hz.
64 Hz and 1 Hz.
5 2
Hz Undefined
R
4 4
Hz Undefined
R
3 8
Hz Undefined
R
2 16
Hz Undefined
R
1 32
Hz Undefined
R
0 64
Hz Undefined
R
14.3.2
Second Counter (RSECCNT)
RSECCNT is used for setting/counting in the BCD-coded second section. The count operation is
performed by a carry for each second of the 64-Hz counter.
performed by a carry for each second of the 64-Hz counter.
The assignable range is from 00 through 59 (practically in BCD), otherwise operation errors
occur. Carry out write processing after stopping the count operation through the setting of the
START bit in RCR2.
occur. Carry out write processing after stopping the count operation through the setting of the
START bit in RCR2.
Undefined Undefined Undefined Undefined Undefined Undefined Undefined
0
1
2
3
4
5
6
7
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R
BIt:
Initial value:
R/W:
-
10 seconds
1 second
Bit Bit
Name
Initial
Value
Value
R/W Description
7
0 R
Reserved
This bit is always read as 0. The write value should
always be 0.
always be 0.
6 to 4
10 seconds Undefined R/W
Counting Ten's Position of Seconds
Counts on 0 to 5 for 60-seconds counting.
3 to 0
1 second
Undefined R/W
Counting One's Position of Seconds
Counts on 0 to 9 once per second. When a carry is
generated, 1 is added to the ten's position.
generated, 1 is added to the ten's position.