Intel SC5650BCDP User Manual

Page of 71
Power Sub-System 
Intel
®
 Server System SC5650BCDP TPS 
 
Intel order number: E80367-002 
Revision 1.5 
 
22 
 
3.1.5.6 
Voltage Regulation 
The power supply output voltages are within the following voltage limits when operating at 
steady state and dynamic loading conditions. These limits include the peak-peak ripple/noise. 
All outputs are measured with reference to the return remote sense signal (ReturnS). The 
+12V3, +12V4, –12V and 5VSB outputs are measured at the power supply connectors 
referenced to ReturnS. The +3.3V, +5V, +12V1, and +12V2 are measured at the remote sense 
signal located at the signal connector. 
Table 19. Voltage Regulation Limits 
Parameter 
Tolerance 
MIN 
NOM 
MAX 
Units 
+ 3.3V 
- 5% / +5% 
+3.14 
+3.30 
+3.46 
V
rms
 
+ 5V 
- 5% / +5% 
+4.75 
+5.00 
+5.25 
V
rms
 
+ 12V1 
- 5% / +5% 
+11.40 
+12.00 
+12.60 
V
rms
 
+ 12V2 
- 5% / +5% 
+11.40 
+12.00 
+12.60 
V
rms
 
+12V3 
- 5% / +5% 
+11.40 
+12.00 
+12.60 
V
rms
 
+12V4 
- 5% / +5% 
+11.40 
+12.00 
+12.60 
V
rms
 
- 12V 
- 5% / +9% 
-11.40 
-12.00 
-13.08 
V
rms
 
+ 5VSB 
- 5% / +5% 
+4.75 
+5.00 
+5.25 
V
rms
 
 
3.1.5.7 
Dynamic Loading 
The output voltages are within the limits specified for the step loading and capacitive loading 
requirements specified in the following table. The load transient repetition rate is tested between 
50Hz and 5 kHz at duty cycles ranging from 10%-90%. The load transient repetition rate is only 
a test specification. The 
Δ step load may occur anywhere within the MIN load and MAX load 
conditions. 
Table 20. Transient Load Requirements 
Output 
Δ Step Load Size 1, 2 
Load Slew Rate 
Test Capacitive Load 
+3.3V 7.0A 
0.25 A/
μsec 4700 
μF 
+5V 7.0A 
0.25 A/
μsec 1000 
μF 
+12V 25A 
0.25 A/
μsec 2700 
μF 
+5VSB 0.5A 
0.25 A/
μsec 20 
μF