Intel QX6700 HH80562PH0678M User Manual

Product codes
HH80562PH0678M
Page of 98
Electrical Specifications
26
Datasheet
2.6.3.1
GTL+ Front Side Bus Specifications
In most cases, termination resistors are not required as these are integrated into the 
processor silicon. See 
 for details on which GTL+ signals do not include on-die 
termination. 
Valid high and low levels are determined by the input buffers by comparing with a 
reference voltage called GTLREF
 lists the GTLREF specifications. The GTL+ 
reference voltage (GTLREF) should be generated on the system board using high 
precision voltage divider circuits. 
2.7
Clock Specifications
2.7.1
Front Side Bus Clock (BCLK[1:0]) and Processor Clocking
BCLK[1:0] directly controls the FSB interface speed as well as the core frequency of the 
processor. As in previous generation processors, the processor’s core frequency is a 
multiple of the BCLK[1:0] frequency. The processor bus ratio multiplier will be set at its 
default ratio during manufacturing. 
The processor uses a differential clocking implementation. For more information on the 
processor clocking, contact your Intel field representative.
Table 14.
GTL+ Bus Voltage Definitions
Symbol
Parameter
Min
Typ
Max
Units Notes
1
NOTES:
1.
Unless otherwise noted, all specifications in this table apply to all processor frequencies.
GTLREF_PU
GTLREF pull-up resistor
124 * 0.99
124
124 * 1.01
Ω
2
2.
GTLREF is to be generated from V
TT
 by a voltage divider of 1% resistors (one divider for each
GTLEREF land). Refer to the 
applicable platform design guide
 for implementation details.
GTLREF_PD
GTLREF pull-down resistor
210 * 0.99
210
210 * 1.01
Ω
R
TT
Termination Resistance
45
50
55
Ω
3
3.
R
TT
 is the on-die termination resistance measured at V
TT
/3 of the GTL+ output driver. 
COMP[3:0]
COMP Resistance
49.40
49.90
50.40
Ω
4
4.
COMP resistance must be provided on the system board with 1% resistors. COMP[3:0] and
COMP8 resistors are to V
SS
.
COMP8
COMP Resistance
24.65
24.90
25.15
Ω
Table 15.
Core Frequency to FSB Multiplier Configuration
Multiplication of System 
Core Frequency to FSB 
Frequency
Core Frequency 
(266 MHz BCLK/
1066 MHz FSB)
Core Frequency 
(333 MHz BCLK/
1333 MHz FSB)
Notes
1, 2
NOTES:
1.
Individual processors operate only at or below the rated frequency.
2.
Listed frequencies are not necessarily committed production frequencies.
1/6
1.60 GHz
2.00 GHz
-
1/7
1.87 GHz
2.33 GHz
-
1/8
2.13 GHz
2.66 GHz
-
1/9
2.40 GHz
3.00 GHz
-
1/10
2.66 GHz
3.33 GHz
-
1/11
2.93 GHz
3.66 GHz
-
1/12
3.20 GHz
4.00 GHz
-