Intel X3470 BV80605001905AJ User Manual

52

Datasheet, Volume 1

SA_DIMM_VREFDQ
SB_DIMM_VREFDQ

Channel A and B Output DDR3 DIMM DQ Reference Voltage. 

O

Analog

SM_RCOMP[2:0]

System Memory Impedance Compensation. 

I

Analog

CFG[17:0]

The CFG signals have a default value of 1 if not 

terminated on the board. 

• CFG[1:0]: PCI Express Bifurcation

      11 = 1 x16 PCI Express

      10 = 2 x8 PCI Express

      01 = 4 x4 PCI Express (requires Intel 3420 or 

3400 Chipset)

      00 = Reserved

• CFG[2]: Reserved configuration land. A test point 

may be placed on the board for this land. 

• CFG[3]: Reserved configuration land.
• CFG[6:4]: Reserved configuration lands. A test 

point may be placed on the board for this land. 

• CFG[17:7]: Reserved configuration lands. Intel 

does not recommend a test point on the board for 

this land.

I

CMOS

COMP0

Impedance compensation must be terminated on the 

system board using a precision resistor. Refer to 

 for the termination requirement.

I

Analog

COMP1

Impedance compensation must be terminated on the 

system board using a precision resistor. Refer to 

 for the termination requirement.

I

Analog

COMP2

Impedance compensation must be terminated on the 

system board using a precision resistor. Refer to 

 for the termination requirement.

I

Analog

COMP3

Impedance compensation must be terminated on the 

system board using a precision resistor. Refer to 

 for the termination requirement.

I

Analog

FC_x

Future Compatibility (FC) signals are signals that are 

available for compatibility with other processors. A test 

point may be placed on the board for these lands. 

PM_EXT_TS#[1:0]

External Thermal Sensor Input: If the system 

temperature reaches a dangerously high value, this 

signal can be used to trigger the start of system 

memory throttling.

I

CMOS

PM_SYNC

Power Management Sync: A sideband signal to 

communicate power management status from the 

platform to the processor.

I

CMOS