Intel D425 AU80610006252AA User Manual
Product codes
AU80610006252AA
Processor Configuration Registers
122
Datasheet
1.9.27
HSRW - Hardware Scratch Read Write
B/D/F/Type: 0/2/0/PCI
Address Offset:
60-61h
Default Value:
0000h
Access:
RW;
Size: 16
bits
Bit Access Default
Value
Description
15:0 RW 0000h
Reserved R/W ():
1.9.28
MSAC - Multi Size Aperture Control
B/D/F/Type: 0/2/0/PCI
Address Offset:
62h
Default Value:
01h
Access:
RW; RO; RW/K;
Size: 8
bits
This register determines the size of the graphics memory aperture in function 0 and in
the trusted space. Only the system BIOS will write this register based on pre- boot
the trusted space. Only the system BIOS will write this register based on pre- boot
address allocation efforts, but the graphics may read this register to determine the
correct aperture size. System BIOS needs to save this value on boot so that it can
correct aperture size. System BIOS needs to save this value on boot so that it can
reset it correctly during S3 resume.
Bit Access Default
Value
Description
7:4 RW 0h
Reserved R/W ():
Scratch Bits Only -- Have no physical effect
on hardware
Scratch Bits Only -- Have no physical effect
on hardware
3:2 RO 00b
Reserved ():
1:0 RW/K 01b
Untrusted Aperture Size (LHSAS):
00:
00:
Reserved
01:
512MB. Bit 28 and 27 of GMADR are
read-only, allowing 512 MB of address space to
be mapped.
10:
be mapped.
10:
256MB. Bit 28 of GMADR is read-write
and bit 27 of GMADR is read-only, limiting the
address space to 256MB.
11:
address space to 256MB.
11:
128MB. Bits 28 and 27 of GMADR are
read-write, allowing 128 MB of address space
to be mapped.
to be mapped.