Intel QX9775 EU80574XL088N Data Sheet
Product codes
EU80574XL088N
Electrical Specifications
16
Datasheet
2.4.1
Front Side Bus Frequency Select Signals (BSEL[2:0])
Upon power up, the FSB frequency is set to the maximum supported by the individual
processor. BSEL[2:0] are CMOS outputs which must be pulled up to V
TT
, and are used
to select the FSB frequency. Refer to
defines
the possible combinations of the signals and the frequency associated with each
combination. The frequency is determined by the processor(s), chipset, and clock
synthesizer. All FSB agents must operate at the same core and FSB frequency.
2.4.2
PLL Power Supply
An on-die PLL filter solution is implemented on the processor. The
V
CCPLL
input is used
for this configuration in Intel
®
Core™2 Extreme processor QX9775
-based platforms.
for DC specifications.
Table 2-2.
BSEL[2:0] Frequency Table
BSEL2
BSEL1
BSEL0
Bus Clock Frequency
0
0
0
Reserved
0
0
1
Reserved
0
1
0
Reserved
0
1
1
Reserved
1
0
0
Reserved
1
0
1
Reserved
1
1
0
400 MHz
1
1
1
Reserved