SMSC LAN9311 User Manual

Two Port 10/100 Managed Ethernet Switch with 16-Bit Non-PCI CPU Interface

SMSC LAN9311/LAN9311i

145

Revision 1.4 (08-19-08)

 

Based on the configuration strap eeprom_type_strap, various sized Microwire EEPROMs are
supported. The varying size ranges are supported by additional bits in the address field
(EPC_ADDRESS) of the 

. Within each size range, the

largest EEPROM uses all the address bits, while the smaller EEPROMs treat the upper address bits
as don’t cares. The EEPROM controller drives all the address bits as requested regardless of the
actual size of the EEPROM. The supported size ranges for Microwire operation are shown in

.

Refer to 

 for detailed Microwire timing information.

, and 

 detail the Microwire command set, including the number of clock

cycles required, for 7, 9, and 11 address bits respectively. These commands are detailed in the
following sections as well as in 

00

7

128 x 8

93xx46A

01

9

256 x 8 and 512 x 8

93xx56A, 93xx66A

10

11

1024 x 8 and 2048 x 8

93xx76A, 93xx86A

11

RESERVED

ERASE

1

11

A6 A5 A4 A3 A2 A1 A0

-

(RDY/~BSY)

10

ERAL

1

00

1 0 X  

X  

X X  

X

-

(RDY/~BSY)

10

EWDS

1

00

0 0 X X  

X  

X  

X

-

Hi-Z

10

EWEN

1

00

1 1  

X X X X X

-

Hi-Z

10

READ

1

10

A6 A5 A4 A3 A2 A1 A0

-

D7 - D0

18

WRITE

1

01

A6 A5 A4 A3 A2 A1 A0

D7 - D0

(RDY/~BSY)

18

WRAL

1

00

0 1 X X X X X

D7 

- 

D0

(RDY/~BSY)

18

ERASE

1

11

A8 A7 A6 A5 A4 A3 A2 A1 A0 

-

(RDY/~BSY)

12

ERAL

1

00

1 0 X X X X X X X

-

(RDY/~BSY)

12