Intel architecture ia-32 User Manual

Vol. 3A 4-43

The processor enforces reserved bit checking in paging data structure entries. The bits being
checked varies with paging mode and may vary with the size of physical address space. 

Table 4-9 shows the reserved bits that are checked when the execute disable bit capability is
enabled (CR4.PAE = 1 and IA32_EFER.NXE = 1). Table 4-9 and Table 4-10 show the
following paging modes:

•

Non-PAE 4-KByte paging: 4-KByte-page only paging (CR4.PAE = 0, CR4.PSE = 0).

•

PSE36: 4-KByte and 4-MByte pages (CR4.PAE = 0, CR4.PSE = 1).

•

PAE: 4-KByte and 2-MByte pages (CR4.PAE = 1, CR4.PSE = X).

In legacy PAE-enabled paging, some processors may only support a 36-bit (or 32-bit) physical
address size; in such cases reserved bit checking still applies to bits 39:36 (or bits 39:32). See
the table note.

If execute disable bit capability is not enabled or not available, reserved bit checking in 64-bit
mode includes bit 63 and additional bits. This and reserved bit checking for legacy 32-bit paging
modes are shown in Table 4-10.

32-bit

4-KByte paging (non-PAE)

No reserved bits checked

PSE36 - PDE, 4-MByte page

Bit [21] 

PSE36 - PDE, 4-KByte page

No reserved bits checked

PSE36 - PTE

No reserved bits checked

PAE - PDP table entry

Bits [63:40] & [8:5] & [2:1]

1

PAE - PDE, 2-MByte page

Bits [62:40] & [20:13]

1

 

PAE - PDE, 4-KByte page

Bits [62:40]

1

PAE - PTE

Bits [62:40]

1

64-bit

PML4E

Bits [51:40] 

PDPTE

Bits [51:40] 

PDE, 2-MByte page

Bits [51:40] & [20:13] 

PDE, 4-KByte page

Bits [51:40] 

PTE

Bits [51:40] 

1. Reserved bit checking also applies to bits 39:36 for processors that support only 36-bits of physical

address. For processor that support only 32 bits of physical address, reserved bit checking also applies
to bits 39:32.