Intel P4500 CP80617004803AA Data Sheet
Product codes
CP80617004803AA
Datasheet
47
Power Management
4.2.5.1
Package C0
The normal operating state for the processor. The processor remains in the normal
state when at least one of its cores is in the C0 or C1 state or when the platform has
not granted permission to the processor to go into a low power state. Individual cores
may be in lower power idle states while the package is in C0.
state when at least one of its cores is in the C0 or C1 state or when the platform has
not granted permission to the processor to go into a low power state. Individual cores
may be in lower power idle states while the package is in C0.
4.2.5.2
Package C1/C1E
No additional power reduction actions are taken in the package C1 state. However, if
the C1E sub-state is enabled, the processor automatically transitions to the lowest
supported core clock frequency, followed by a reduction in voltage.
the C1E sub-state is enabled, the processor automatically transitions to the lowest
supported core clock frequency, followed by a reduction in voltage.
The package enters the C1 low power state when:
At least one core is in the C1 state.
The other cores are in a C1 or lower power state.
The package enters the C1E state when:
All cores have directly requested C1E via MWAIT(C1) with a C1E sub-state hint.
All cores are in a power state lower that C1/C1E but the package low power state is
limited to C1/C1E via the PMG_CST_CONFIG_CONTROL MSR.
limited to C1/C1E via the PMG_CST_CONFIG_CONTROL MSR.
All cores have requested C1 using HLT or MWAIT(C1) and C1E auto-promotion is
enabled in IA32_MISC_ENABLES.
enabled in IA32_MISC_ENABLES.
Figure 4-11.Package C-State Entry and Exit
C0
C1
C6
C3