Intel P4500 CP80617004803AA Data Sheet
Product codes
CP80617004803AA
Datasheet
55
Thermal Management
5
Processor core and integrated graphics and memory controller junction temperatures are monitored
by their respective DTS. A DTS outputs a temperature relative to the maximum supported junction
temperature. The error associated with DTS measurements will not exceed ±5°C within the
operating range.
by their respective DTS. A DTS outputs a temperature relative to the maximum supported junction
temperature. The error associated with DTS measurements will not exceed ±5°C within the
operating range.
6
The power supply to the processor core and the integrated graphics /Memory core should be
designed as per Intels guidelines.
designed as per Intels guidelines.
7
Processor core currents is monitored by IMON VR feedback (ISENSE) and calculated using a moving
average method. Error associated with power monitoring will depend upon individual VR design.
average method. Error associated with power monitoring will depend upon individual VR design.
8
A thermal solution for an power sharing enabled system needs to ensure that the Tj limit is not
exceeded while operating under the two extreme power conditions between the processor core and
the integrated graphics and memory controller components.
exceeded while operating under the two extreme power conditions between the processor core and
the integrated graphics and memory controller components.
9
Projected range in advance of the measured product data. Measured values will be available after
silicon characterization.
silicon characterization.
10
For power sharing designs it is recommended to establish the full cooling capability within 10°C of
the T
the T
j,max
specifications. Some processors may have a different Tj max value, please refer to the
processor Specification Update for details.
11
In rare occasions the specified maximum power limits may be violated when the package is not at a
thermally constrained environment
thermally constrained environment
12
Tj, min =0 deg
13
While running intensive graphical and computational workloads simultaneously the concurrent
package power may exceed specified limits in exceptional occasions. Nevertheless, the individual
component powers are not to exceed the component TDPs specified.
package power may exceed specified limits in exceptional occasions. Nevertheless, the individual
component powers are not to exceed the component TDPs specified.
Intel Celeron Mobile Processor U3000 Series Dual-Core ULV Thermal Power Specifications
TDP
1,2,6,7
Frequency
Power Sharing Design
Points
8
T
j,max
4,5,10,12
HFM
10.5
8.5
18
1.20
500
up to
667
Proc: 10.5
Int. Gfx: 4
Proc: 7
Int Gfx:11
18
105
100
LFM
9
8.5
17.5
667 MHz
N/A
N/A
N/A
N/A
HFM
10.5
8.5
18
1.06
500
up to
667
Proc: 10.5
Int. Gfx: 4
Proc: 7
Int Gfx:11
18
105
100
LFM
9
8.5
17.5
667 MHz
N/A
N/A
N/A
N/A
Note
Definition