Intel III Xeon 800 MHz 80526KZ800256 User Manual
Product codes
80526KZ800256
PROCESSOR FEATURES
44
R
10K
1/16W
5%
10K
1/16W
5%
R
10K
1/16W
5%
R
10K
1/16W
5%
R
10K
1/16W
5%
R
10K
1/16W
5%
SDA
SCL
WP
SA1
Core
A2D
Vcc
SC
SD
A1
A0
Stby
C
A
ALERT
#
#
SMBALERT
SA2
SMB_V
INTEL
CPU
EEPROM
SC
WP
SD
A0
A1
A2
Vcc
OEM
EEPROM
SC
WP
SD
A0
A1
A2
Vcc
R
10K
1/16W
5%
R
10K
1/16W
5%
R
10K
1/16W
5%
1/16W
5%
SA0
R
10K
1/16W
5%
R
10K
1/16W
5%
10K
1/16W
5%
Figure 16. Logical
1
Schematic of SMBus Circuitry
NOTES:
1.
Actual implementation may vary. For use in general understanding of the architecture.
5.2.1 PROCESSOR
INFORMATION
ROM
The processor implements previously defined fields in the processor information ROM (PI-ROM) to allow
visibility of core and On Cartridge Voltage Regulation (OCVR) voltage requirements. These features are
present in other SC330 processors, but are used in a different way in the Pentium® III Xeon™ processor at
700 MHz and 900 MHz. The Pentium® III Xeon™ processor at 700 MHz and 900 MHz implements the OCVR
device. This provides the flexibility to accommodate products with voltage input of 2.8V for one product
version and 5V or 12V for a different product version. The 2.8V or 5V version is indicated in the PI-ROM
“OCVR option 1 Input Voltage ID” field, while the 12V version is indicated in the “OCVR option 2 Input Voltage
ID” PI-ROM field.
The implementation of the PI-ROM in the processor allows software to view the desired voltage outputs of the
power source (VRM or Power Supply) feeding the OCVR and of the OCVR itself. Software could compare
those values to actual power source/OCVR outputs (using an A/D converter), and determine if the power
source and OCVR are operating correctly. The implementation of the PI-ROM gives system designers a
means of determining the proper OCVR Output Voltage requirements. Without these fields, the baseboard
has no way of determining the OCVR Output Voltage requirements.
The fields defined for the Pentium® III Xeon™ processor at 700 MHz and 900 MHz coincide as closely as
possible with those for previous versions of the Pentium® III Xeon™ processor. The meaningless (for
Pentium® III Xeon™ processor at 700 MHz and 900 MHz) “L2 Cache Voltage” field is replaced with a more
useful “OCVR Output” field. The Pentium® III Xeon™ processor at 700 MHz and 900 MHz (SC330.1) has a
pin defined (A56, “VIN_SENSE”) that allows the baseboard to directly measure the actual OCVR input
voltage, and pin (B83, “AN_CORE_VSENSE”) that is an analog representation of the voltage at the OCVR
output. This voltage can be compared with the desired voltage (indicated by the PIR field) to determine if the
OCVR input / output voltage is varying from desired levels.
visibility of core and On Cartridge Voltage Regulation (OCVR) voltage requirements. These features are
present in other SC330 processors, but are used in a different way in the Pentium® III Xeon™ processor at
700 MHz and 900 MHz. The Pentium® III Xeon™ processor at 700 MHz and 900 MHz implements the OCVR
device. This provides the flexibility to accommodate products with voltage input of 2.8V for one product
version and 5V or 12V for a different product version. The 2.8V or 5V version is indicated in the PI-ROM
“OCVR option 1 Input Voltage ID” field, while the 12V version is indicated in the “OCVR option 2 Input Voltage
ID” PI-ROM field.
The implementation of the PI-ROM in the processor allows software to view the desired voltage outputs of the
power source (VRM or Power Supply) feeding the OCVR and of the OCVR itself. Software could compare
those values to actual power source/OCVR outputs (using an A/D converter), and determine if the power
source and OCVR are operating correctly. The implementation of the PI-ROM gives system designers a
means of determining the proper OCVR Output Voltage requirements. Without these fields, the baseboard
has no way of determining the OCVR Output Voltage requirements.
The fields defined for the Pentium® III Xeon™ processor at 700 MHz and 900 MHz coincide as closely as
possible with those for previous versions of the Pentium® III Xeon™ processor. The meaningless (for
Pentium® III Xeon™ processor at 700 MHz and 900 MHz) “L2 Cache Voltage” field is replaced with a more
useful “OCVR Output” field. The Pentium® III Xeon™ processor at 700 MHz and 900 MHz (SC330.1) has a
pin defined (A56, “VIN_SENSE”) that allows the baseboard to directly measure the actual OCVR input
voltage, and pin (B83, “AN_CORE_VSENSE”) that is an analog representation of the voltage at the OCVR
output. This voltage can be compared with the desired voltage (indicated by the PIR field) to determine if the
OCVR input / output voltage is varying from desired levels.