Intel III Xeon 733 MHz 80526KZ733256 User Manual
Product codes
80526KZ733256
INTRODUCTION
6
1. INTRODUCTION
The Pentium® III Xeon™ processor at 700 MHz and 900 MHz, like the Pentium® Pro, Pentium® II, Pentium® II Xeon™
and previous Pentium® III Xeon™ processors, implements a Dynamic Execution micro-architecture, a unique combination
of multiple branch prediction, data flow analysis, and speculative execution. The Pentium® III Xeon™ processor at 700
MHz will be available in 1MB and 2MB L2 cache sizes whereas the Pentium® III Xeon™ processor at 900 MHz will only
be available in the 2MB L2 cache size.
The Pentium® III Xeon™ processor improves upon previous generations of Intel® processors by adding Streaming SIMD
Extensions. The Single Instruction Multiple Data (SIMD) extensions significantly accelerate performance of 3D graphics.
Besides 3D graphics improvements, the extensions also include additional integer and cacheability instructions that
improve other aspects of performance. In addition, the Pentium® III Xeon™ processor utilizes a variation of the S.E.C.
(Single Edge Contact) package technology first introduced on the Pentium® II processor. The SEC packaging technology
allows the Pentium® III Xeon™ processor at 700 MHz and 900 MHz to implement the Dual Independent Bus Architecture
and have up to 2MB of level 2 cache. The level 2 cache is integrated in the processing unit and communication occurs at
the full speed of the processor core.
As with previous members of the Pentium® II Xeon™ processor family, the Pentium® III Xeon™ processor at 700 MHz
and 900 MHz features built-in direct multiprocessing support. For systems with up to four processors, it is important to
consider the additional power requirements and signal integrity issues of supporting multiple loads on a high-speed bus.
The Pentium® III Xeon™ processor at 700 MHz and 900 MHz supports both uni-processor and multiprocessor
implementations with support for up to four processors on each local processor bus, or system bus.
The processor system bus I/O buffers operate using Assisted Gunning Transistor Logic, or AGTL+. The processor uses
the S.E.C. cartridge package supported by the SC330 Connector (See Chapter 7 for the processor mechanical
specifications.)
The Pentium® III Xeon™ processor includes an SMBus interface that allows access to several processor features,
including two memory components (referred to as the Processor Information ROM and the Scratch EEPROM) and a
thermal sensor on the processor substrate.
The Pentium® III Xeon™ processor at 700 MHz and 900 MHz system bus definition uses the SC330.1 interface. The
SC330.1 interface is an electrical only enhancement to the SC330 (formerly Slot2) interface that allows supporting for a 4-
way Pentium® III Xeon™ processor at 700 MHz and 900 MHz-based system running at 100 MHz system bus frequency.
The SC330.1 specification adds the required flexibility to accommodate control and monitoring signals for an OCVR (On
Cartridge Voltage Regulator). The OCVR provides the necessary high precision regulation used by Intel’s latest silicon
technology. This document provides information regarding the design of a system using the Pentium® III Xeon™
processor at 700 MHz and 900 MHz with the new SC330.1 bus specification.
The Pentium® III Xeon™ processor at 700 MHz and 900 MHz is designed to be compatible with previous SC330-
compliant baseboards given that an existing platform meets the signal integrity and timing requirements of Intel’s latest
silicon technology as specified in this document. For details on system compatibility requirements refer to the Pentium III
Xeon Processor System Compatibility Guidelines. Certain versions of the processor are designed to be compatible with
the existing VRM 8.3 Guidelines, allowing an easy transition for Flexible Mother Board designs. The 2.8V version of the
processor (regardless of frequency and cache size) is designed for compatibility with the VRM 8.3 Guidelines. The
5V/12V version of the processor adds flexibility to operate at either 5 Volts or 12 Volts. The new flexible motherboard
specification that incorporates the SC330.1 interface uses the same form factor and pin definition of the existing SC330
(formerly Slot 2) processors, but adds signals to control an OCVR and remote sensing capabilities. The SC330.1
enhancement is electrically and mechanically compatible with baseboards designed for the SC330 interface.
and previous Pentium® III Xeon™ processors, implements a Dynamic Execution micro-architecture, a unique combination
of multiple branch prediction, data flow analysis, and speculative execution. The Pentium® III Xeon™ processor at 700
MHz will be available in 1MB and 2MB L2 cache sizes whereas the Pentium® III Xeon™ processor at 900 MHz will only
be available in the 2MB L2 cache size.
The Pentium® III Xeon™ processor improves upon previous generations of Intel® processors by adding Streaming SIMD
Extensions. The Single Instruction Multiple Data (SIMD) extensions significantly accelerate performance of 3D graphics.
Besides 3D graphics improvements, the extensions also include additional integer and cacheability instructions that
improve other aspects of performance. In addition, the Pentium® III Xeon™ processor utilizes a variation of the S.E.C.
(Single Edge Contact) package technology first introduced on the Pentium® II processor. The SEC packaging technology
allows the Pentium® III Xeon™ processor at 700 MHz and 900 MHz to implement the Dual Independent Bus Architecture
and have up to 2MB of level 2 cache. The level 2 cache is integrated in the processing unit and communication occurs at
the full speed of the processor core.
As with previous members of the Pentium® II Xeon™ processor family, the Pentium® III Xeon™ processor at 700 MHz
and 900 MHz features built-in direct multiprocessing support. For systems with up to four processors, it is important to
consider the additional power requirements and signal integrity issues of supporting multiple loads on a high-speed bus.
The Pentium® III Xeon™ processor at 700 MHz and 900 MHz supports both uni-processor and multiprocessor
implementations with support for up to four processors on each local processor bus, or system bus.
The processor system bus I/O buffers operate using Assisted Gunning Transistor Logic, or AGTL+. The processor uses
the S.E.C. cartridge package supported by the SC330 Connector (See Chapter 7 for the processor mechanical
specifications.)
The Pentium® III Xeon™ processor includes an SMBus interface that allows access to several processor features,
including two memory components (referred to as the Processor Information ROM and the Scratch EEPROM) and a
thermal sensor on the processor substrate.
The Pentium® III Xeon™ processor at 700 MHz and 900 MHz system bus definition uses the SC330.1 interface. The
SC330.1 interface is an electrical only enhancement to the SC330 (formerly Slot2) interface that allows supporting for a 4-
way Pentium® III Xeon™ processor at 700 MHz and 900 MHz-based system running at 100 MHz system bus frequency.
The SC330.1 specification adds the required flexibility to accommodate control and monitoring signals for an OCVR (On
Cartridge Voltage Regulator). The OCVR provides the necessary high precision regulation used by Intel’s latest silicon
technology. This document provides information regarding the design of a system using the Pentium® III Xeon™
processor at 700 MHz and 900 MHz with the new SC330.1 bus specification.
The Pentium® III Xeon™ processor at 700 MHz and 900 MHz is designed to be compatible with previous SC330-
compliant baseboards given that an existing platform meets the signal integrity and timing requirements of Intel’s latest
silicon technology as specified in this document. For details on system compatibility requirements refer to the Pentium III
Xeon Processor System Compatibility Guidelines. Certain versions of the processor are designed to be compatible with
the existing VRM 8.3 Guidelines, allowing an easy transition for Flexible Mother Board designs. The 2.8V version of the
processor (regardless of frequency and cache size) is designed for compatibility with the VRM 8.3 Guidelines. The
5V/12V version of the processor adds flexibility to operate at either 5 Volts or 12 Volts. The new flexible motherboard
specification that incorporates the SC330.1 interface uses the same form factor and pin definition of the existing SC330
(formerly Slot 2) processors, but adds signals to control an OCVR and remote sensing capabilities. The SC330.1
enhancement is electrically and mechanically compatible with baseboards designed for the SC330 interface.