Intel E7-8891 v2 CM8063601377422 User Manual

Product codes
CM8063601377422
Page of 504
Intel
®
 Xeon
® 
Processor E7-2800/4800/8800 v2 Product Family
143
Datasheet Volume Two: Functional Description, February 2014
Processor Uncore Configuration Registers
13.2.4.24 TCZQCAL
Timing Constraints ZQ Calibration Timing Parameter. 
13.2.4.25 TCSTAGGER_REF
tRFC like timing constraint parameter except it is a timing constraint applicable to REF-
REF separation between different ranks on a channel. 
13.2.4.26 TCMR0SHADOW
MR0 Shadow Register
7:6
RV
-
Reserved.
5:0
RW
0x18
MR2_SHDW_A5TO0 (mr2_shdw_a5to0):
Copy of MR2 A[5:0] shadow
Type:
CFG
PortID: N/A
Bus:
1
Device: 16
Function:
0,1,4,5
Bus:
1
Device: 30
Function:
0,1,4,5
Offset:
0x21c
Bit
Attr
Default
Description
Type:
CFG
PortID: N/A
Bus:
1
Device: 16
Function:
0,1,4,5
Bus:
1
Device: 30
Function:
0,1,4,5
Offset:
0x220
Bit
Attr
Default
Description
31:16 RV
-
Reserved.
15:8
RW
0x40
T_ZQCS (t_zqcs):
tZQCS in DCLK cycles (32 to 255, default is 64)
7:0
RW
0x80
ZQCSPERIOD (zqcsperiod):
Time between ZQ-FSM initiated ZQCS operations in tREFI * 128 (2 to 255, 
default is 128).
Note: ZQCx is issued at SRX.
Type:
CFG
PortID: N/A
Bus:
1
Device: 16
Function:
0,1,4,5
Bus:
1
Device: 30
Function:
0,1,4,5
Offset:
0x224
Bit
Attr
Default
Description
31:10
RV
-
Reserved.
9:0
RW
0x80
T_STAGGER_REF (t_stagger_ref):
tRFC like timing constraint parameter except it is a timing constraint 
applicable to REF-REF separation between different ranks on a channel.
It is recommended to set T_STAGGER_REF equal or less than the T_RFC 
parameter which is defined as:
0800 MT/s : 040h
1067 MT/s : 056h
1333 MT/s : 06Bh
1600 MT/s : 080h
1867 MT/s : 096h
downloadlike
ArtboardArtboardArtboard
Report Bug