Intel E7-8891 v2 CM8063601377422 User Manual

Product codes
CM8063601377422
Page of 504
Intel
®
 Xeon
® 
Processor E7-2800/4800/8800 v2 Product Family
313
Datasheet Volume Two: Functional Description, February 2014
Integrated I/O (IIO) Configuration Registers
14.4.5
RID
14.4.6
CCR
Accesses to the CCR field are redirected to the UBox due to DWORD alignment.
3:3
RO_V
0x0
intxsts:
Indicates that a legacy INTx interrupt condition is pending internally in the 
Intel® Quick Data DMA device. This bit has meaning only in the legacy 
interrupt mode. This bit is always 0 when MSI-X (see xref ) has been 
selected for DMA interrupts. Note that the setting of the INTx status bit is 
independent of the INTx enable bit in the PCI command register that is, this 
bit is set anytime the DMA engine is setup by software to generate a INTx 
interrupt and the condition that triggers the interrupt has occurred, 
regardless of whether a legacy interrupt message was signaled or not. Note 
that the INTx enable bit has to be set in the PCICMD register for DMA to 
generate a INTx message to the ICH. This is cleared when the internal 
interrupt condition is cleared by software.
2:0
RV
-
Reserved. 
Type:
CFG
PortID:
N/A
Bus:
0
Device:
4Function:0-7
Offset:
0x8
Bit
Attr
Default
Description
7:0
RO_V
0x0
revision_id:
Reflects the Uncore Revision ID after reset.
Reflects the Compatibility Revision ID after BIOS writes 0x69 to any RID 
register in any Intel Xeon processor E7-2800/4800/8800 v2 product family 
Product Family function.
Implementation Note:
Read and write requests from the host to any RID register in any Intel Xeon 
processor E7-2800/4800/8800 v2 product family Product Family function are 
redirected to the UBox.
Type:
CFG
PortID:
N/A
Bus:
0
Device:
4Function:0-7
Offset:
0x6
Bit
Attr
Default
Description
Type:
CFG
PortID:
N/A
Bus:
0
Device:
4Function:0-7
Offset:
0x9
Bit
Attr
Default
Description
23:16
RO_V
0x08
base_class:
Generic Device
15:8
RO_V
0x80
sub_class:
Generic Device
7:0
RO_V
0x0
register_level_programming_interface:
Set to 00h for all non-APIC devices.
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