Intel E7-8891 v2 CM8063601377422 User Manual

Product codes
CM8063601377422
Page of 504
Integrated I/O (IIO) Configuration Registers
374
Intel
®
 Xeon
® 
Processor E7-2800/4800/8800 v2 Product Family
Datasheet Volume Two: Functional Description, February 2014
14.6.40 CIPINTRS
Coherent Interface Protocol Interrupt Status.
This register is to be polled by BIOS to determine if internal pending system interrupts 
are drained out of IIO. General usage model is for software to quiesce the source e.g. 
IOM global error logic of a system event like SMI, then poll this register till this register 
indicates that the event is not pending inside IIO. One additional read is required from 
software, after the register first reads 0 for the associated event.
25:25
RW
0x0
dis_intx_route2ich:
When this bit is set. Local INTx messages received from the Intel® Quick 
Data DMA/PCI Express ports are not routed to legacy PCH - they are either 
converted into MSI via the integrated I/OxAPIC (if the I/OxAPIC mask bit is 
clear in the appropriate entries) or cause no further action (when mask bit is 
set)
24:19
RV
-
Reserved.
18:18
RW
0x0
smi_msi_en:
When set the generated messages will be routed to IntPhysical message, 
otherwise a VLW message is used instead.
17:17
RV
-
Reserved.
16:16
RW
0x0
nmi_msi_en:
When set the generated messages will be routed to IntPhysical message, 
otherwise a VLW message is used instead.
15:11
RV
-
Reserved.
10:10
RW
0x1
smi_mask:
When set, the interrupt will not be set.
9:9
RV
-
Reserved.
8:8
RW
0x1
nmi_mask:
When set, the interrupt will not be set.
7:7
RW_L
0x0
ia32_or_ipf:
This bit should always be programmed to zero. The setting of zero indicates 
an IA32 system.
6:0
RV
-
Reserved.
Type:
CFG
PortID:
N/A
Bus:
0
Device:
5Function:0
Offset:
0x14c
Bit
Attr
Default
Description
Type:
CFG
PortID:
N/A
Bus:
0
Device:
5Function:0
Offset:
0x154
Bit
Attr
Default
Description
31:31
RW1CS
0x0
smi:
This is set whenever IIO forwards a VLW from PCH that had the SMI bit 
asserted
downloadlike
ArtboardArtboardArtboard
Report Bug