Intel J1850 FH8065301455200 User Manual

1008

Datasheet

Default: 00000000h

7:6

0b

RO

reserved2: Reserved.

5

0b

RW

GBL Status (GBL_STS) (gbl_sts): This bit is set when an SCI is generated due to the 

BIOS wanting the attention of the SCI handler. BIOS has a corresponding bit, 

BIOS_RLS, which will cause an SCI and set this bit. The SCI handler should then clear 

this bit by writing a 1 to it. This bit will not cause wake events or SMI#. This bit is not 

effected by SCI_EN. Note: GBL_STS being set will cause an SCI, even if the SCI_EN bit 

is not set. Software must take great care not to set the BIOS_RLS bit (which causes 

GBL_STS to be set) if the SCI handler is not in place. reset_type=PMU_PLTRST_B

4:1

0b

RO

reserved3 (rserved3): reserved

0

0b

RW

Timer Overflow Status (TMROF_STS) (tmrof_sts): This is the timer overflow status 

bit. This bit gets set anytime bit 22 of the 24 bit timer goes low (bits are counted from 0 

to 23). This will occur every 2.3435 seconds. See TMROF_EN for the effect when 

TMROF_STS goes active. Software clears this bit by writing a 1 to it. 

reset_type=PMU_PLTRST_B

Type: I/O Register

(Size: 32 bits)

ACPI_BASE_ADDRESS Type: PCI Configuration Register (Size: 

32 bits)
ACPI_BASE_ADDRESS Reference: [B:0, D:31, F:0] + 40h

31

28

24

20

16

12

8

4

0

0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

re

se

rv

ed

slp

_

en

sl

p

_

ty

p

re

se

rv

ed

1

gb

l_rls

bm_rld

sc

i_en

31:14

0b

RO

reserved: Reserved.

13

0b

WO

Sleep Enable (SLP_EN) (slp_en): This is a write-only bit and reads to it always 

return a zero. Setting this bit causes the system to sequence into the Sleep state 

defined by the SLP_TYP field.

12:10

0b

RW

Sleep Type (SLP_TYP) (slp_typ): This 3-bit field defines the type of Sleep the 

system should enter when the SLP_EN bit is set to 1. These bits are reset by 

SRTCRST_B only. Bits Mode Typical Mapping 000 ON S0 001 Puts CPU in S1 state. S1 

010 Reserved 011 Reserved 100 Reserved 101 Suspend-To-RAM S3 110 Suspend-To-

Disk S4 111 Soft Off S5

9:3

0b

RO

reserved1: Reserved.

2

0b

RW

GBL_RLS (GBL_RLS) (gbl_rls): This bit is used by the ACPI software to raise an 

event to the BIOS software. BIOS software has a corresponding enable and status bits 

to control its ability to receive ACPI events. This bit always reads as 0.

1

0b

RW

BM_RLD (BM_RLD) (bm_rld): This bit is treated as a scratchpad bit