Intel J1850 FH8065301455200 User Manual
Product codes
FH8065301455200
Datasheet
1039
PCU - Serial Peripheral Interface (SPI)
20.4
PCU SPI for Firmware Memory Mapped I/O Registers
Table 154.
Summary of PCU SPI for Firmware Memory Mapped I/O Registers—
SPI_BASE_ADDRESS
Offset
Size
Register ID—Description
Default
Value
0h
4
00001FFFh
4h
2
0000h
6h
2
0000h
8h
4
00000000h
10h
4
00000000h
14h
4
00000000h
18h
4
00000000h
1Ch
4
00000000h
20h
4
00000000h
24h
4
00000000h
28h
4
00000000h
2Ch
4
00000000h
30h
4
00000000h
34h
4
00000000h
38h
4
00000000h
3Ch
4
00000000h
40h
4
00000000h
44h
4
00000000h
48h
4
00000000h
4Ch
4
00000000h
50h
4
00000202h
54h
4
00001FFFh
58h
4
00001FFFh
5Ch
4
00001FFFh
60h
4
00001FFFh
64h
4
00001FFFh
74h
4
00000000h
78h
4
00000000h
7Ch
4
00000000h
80h
4
00000000h
84h
4
00000000h
90h
4
F8000000h
94h
2
0000h
96h
2
0000h
98h
4
00000000h