Intel J1850 FH8065301455200 User Manual
Product codes
FH8065301455200
Datasheet
17
Introduction
1.2
Feature Overview
All features subject to software availability.
Note:
SIO (SPI, HSUART, PWM), and LPE interfaces are not planned to be supported by this
processor on Windows*8 platform.
processor on Windows*8 platform.
1.2.1
Processor Core
See
for more details.
•
Dual or Quad-core processor
•
Up to four IA-compatible low-power Intel
®
processor cores
— One thread per core
•
Two-wide instruction decode, out of order execution
•
On-die, 32 KB 8-way L1 instruction cache and 24 KB 6-way L1 data cache per core
•
On-die, 1 MB, 16-way L2 cache, shared per two cores
•
36-bit physical address, 48-bit linear address size support
•
Supported C-states: C0, C1, C6, C7
•
Supports Intel
®
Virtualization Technology (Intel
®
VT-x)
1.2.2
System Memory Controller
See
for more details.
•
Supports up to two channels of DDR3L
•
64 bit data bus for each channel
•
Supports x8 and x16 DDR3L SDRAM device data widths
•
Supports DDR3L with 1066 or 1333 MT/s data rates
— Total memory bandwidth supported is 8.5 GB/s (for 1066 MT/s single channel)
scalable to 21.3GB/s (for 1333 MT/s dual channel)
•
Supports different physical mappings of bank addresses to optimize performance
•
Out-of-order request processing to increase performance
•
Aggressive power management to reduce power consumption
•
Proactive page closing policies to close unused pages
1.2.3
Display Controller
See
for more details.
•
Support 2 DDI ports to enable eDP 1.3, DP 1.1a, DVI, or HDMI 1.4a
•
Support 2 panel power sequence for 2 eDP ports