Fixed IO registers are accessed by specifying the 16-bit address in a PORT IN and/or
PORT OUT transaction from the processor core. This allows direct manipulation of the
registers. Fixed IO registers are unmovable registers in IO space.

3.2

Fixed Memory Mapped Register Access

Fixed Memory Mapped IO (MMIO) registers are accessed by specifying the 32/36-bit
address in a memory transaction from the processor core. This allows direct
manipulation of the registers. Fixed MMIO registers are unmovable registers in memory
space.

3.3

IO Referenced Register Access

IO referenced registers use programmable base address registers (BARs) to select a
range of IO addresses that it will use to decode PORT IN and/or PORT OUT transactions
from the processor to directly access a register. Thus, the IO BARs act as pointers to
blocks of actual IO registers. To access an IO referenced register for a specific IO base
address, start with that base address and add the register’s offset. Example pseudo
code for an IO referenced register read is shown below:

Register_Snapshot = IOREAD([IO_BAR]+Register_Offset)

Table 24. Fixed IO Register Access Method Example (P80 Register)

Type: I/O Register

(Size: 32 bits)

P80: 80h

Table 25. Fixed Memory Mapped Register Access Method Example (IDX Register)

Type: Memory Mapped I/O Register

(Size: 32 bits)

IDX: FEC00000h