Intel J1850 FH8065301455200 User Manual
Product codes
FH8065301455200
PCU - Power Management Controller (PMC)
968
Datasheet
19.5
PCU PMC Memory Mapped I/O Registers
Table 144.
Summary of PCU iLB PMC Memory Mapped I/O Registers—
PMC_BASE_ADDRESS
Offset
Size
Register ID—Description
Default
Value
0h
4
00000000h
8h
4
00000000h
Ch
4
00000000h
10h
4
00000000h
20h
4
00004004h
24h
4
00000000h
28h
4
00000000h
2Ch
4
00000000h
30h
4
00000000h
34h
4
00000000h
38h
4
00000000h
3Ch
4
00FFFFFFh
40h
4
00000000h
48h
4
00230000h
50h
4
00000000h
58h
4
00000000h
60h
4
00000003h
64h
4
00000003h
68h
4
00000003h
6Ch
4
00000003h
70h
4
00000003h
74h
4
00000003h
80h
4
00000000h
84h
4
00000000h
88h
4
00000000h
8Ch
4
00000000h
90h
4
00000000h
98h
4
00000000h
A0h
4
00000000h
A4h
4
00000000h
A8h
4
00000000h