Microchip Technology MCU PIC PIC18F87K22-I/PTRSL TQFP-80 MCP PIC18F87K22-I/PTRSL Data Sheet
Product codes
PIC18F87K22-I/PTRSL
2009-2011 Microchip Technology Inc.
DS39960D-page 169
PIC18F87K22 FAMILY
12.1.4
ANALOG AND DIGITAL PORTS
Many of the ports multiplex analog and digital function-
ality, providing a lot of flexibility for hardware designers.
PIC18F87K22 family devices can make any analog pin
analog or digital, depending on an application’s needs.
The ports’ analog/digital functionality is controlled by
registers: ANCON0, ANCON1 and ANCON2.
ality, providing a lot of flexibility for hardware designers.
PIC18F87K22 family devices can make any analog pin
analog or digital, depending on an application’s needs.
The ports’ analog/digital functionality is controlled by
registers: ANCON0, ANCON1 and ANCON2.
Setting these registers makes the corresponding pins
analog and clearing the registers makes the ports digi-
tal. For details on these registers, see
analog and clearing the registers makes the ports digi-
tal. For details on these registers, see
.
REGISTER 12-4:
ODCON3: PERIPHERAL OPEN-DRAIN CONTROL REGISTER 3
R/W-0
R/W-0
U-0
U-0
U-0
U-0
U-0
R/W-0
U2OD
U1OD
—
—
—
—
—
CTMUDS
bit 7
bit 0
Legend:
R = Readable bit
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 7
U2OD:
EUSART2 Open-Drain Output Enable bit
1
= Open-drain capability is enabled
0
= Open-drain capability is disabled
bit 6
U1OD:
EUSART1 Open-Drain Output Enable bit
1
= Open-drain capability is enabled
0
= Open-drain capability is disabled
bit 5-1
Unimplemented:
Read as ‘0’
bit 0
CTMUDS:
CTMU Pulse Delay Enable bit
1
= Pulse delay input for CTMU is enabled on pin, RF1
0
= Pulse delay input for CTMU is disabled on pin, RF1