Microchip Technology MCU PIC PIC18F87K22-I/PTRSL TQFP-80 MCP PIC18F87K22-I/PTRSL Data Sheet
Product codes
PIC18F87K22-I/PTRSL
2009-2011 Microchip Technology Inc.
DS39960D-page 361
PIC18F87K22 FAMILY
After the A/D module has been configured as desired,
the selected channel must be acquired before the
conversion can start. The analog input channels must
have their corresponding TRIS bits selected as inputs.
To determine acquisition time, see
the selected channel must be acquired before the
conversion can start. The analog input channels must
have their corresponding TRIS bits selected as inputs.
To determine acquisition time, see
. After this acquisition
time has elapsed, the A/D conversion can be started.
An acquisition time can be programmed to occur
between setting the GO/DONE bit and the actual start
of the conversion.
To do an A/D conversion, follow these steps:
1.
An acquisition time can be programmed to occur
between setting the GO/DONE bit and the actual start
of the conversion.
To do an A/D conversion, follow these steps:
1.
Configure the A/D module:
• Configure the required ADC pins as analog
• Configure the required ADC pins as analog
pins (ANCON0, ANCON1 and ANCON2)
• Set the voltage reference (ADCON1)
• Select the A/D positive and negative input
• Select the A/D positive and negative input
channels (ADCON0 and ADCON1)
• Select the A/D acquisition time (ADCON2)
• Select the A/D conversion clock (ADCON2)
• Turn on the A/D module (ADCON0)
• Select the A/D conversion clock (ADCON2)
• Turn on the A/D module (ADCON0)
2.
Configure the A/D interrupt (if desired):
• Clear the ADIF bit (PIR1<6>)
• Set the ADIE bit (PIE1<6>)
• Set the GIE bit (INTCON<7>)
• Clear the ADIF bit (PIR1<6>)
• Set the ADIE bit (PIE1<6>)
• Set the GIE bit (INTCON<7>)
3.
Wait the required acquisition time (if required).
4.
Start the conversion:
• Set the GO/DONE bit (ADCON0<1>)
• Set the GO/DONE bit (ADCON0<1>)
5.
Wait for A/D conversion to complete, by either:
• Polling for the GO/DONE bit to be cleared
OR
• Waiting for the A/D interrupt
• Polling for the GO/DONE bit to be cleared
OR
• Waiting for the A/D interrupt
6.
Read A/D Result registers (ADRESH:ADRESL)
and, if required, clear bit, ADIF.
and, if required, clear bit, ADIF.
7.
For the next conversion, begin with Step 1 or 2,
as required.
The A/D conversion time per bit is defined as T
as required.
The A/D conversion time per bit is defined as T
AD
.
Before the next acquisition starts, a minimum Wait
of 2 T
of 2 T
AD
is required.
FIGURE 23-5:
ANALOG INPUT MODEL
V
AIN
C
PIN
R
S
ANx
5 pF
V
DD
V
T
= 0.6V
V
T
= 0.6V
I
LEAKAGE
R
IC
1k
Sampling
Switch
Switch
SS
R
SS
C
HOLD
= 25 pF
V
SS
Sampling Switch
1
2
3
4
(k
)
V
DD
±100 nA
Legend:
C
PIN
V
T
I
LEAKAGE
R
IC
SS
C
C
HOLD
= Input Capacitance
= Threshold Voltage
= Leakage Current at the pin due to
= Threshold Voltage
= Leakage Current at the pin due to
= Interconnect Resistance
= Sampling Switch
= Sample/Hold Capacitance (from DAC)
= Sampling Switch
= Sample/Hold Capacitance (from DAC)
various junctions
= Sampling Switch Resistance
R
SS