Microchip Technology IC PIC MCU PIC18F65J15-I/PT TQFP-64 MCP PIC18F65J15-I/PT Data Sheet
Product codes
PIC18F65J15-I/PT
PIC18F87J10 FAMILY
DS39663F-page 8
© 2009 Microchip Technology Inc.
FIGURE 1-1:
PIC18F6XJ10/6XJ15 (64-PIN) BLOCK DIAGRAM
Instruction
Decode and
Control
PORTA
Data Latch
Data Memory
(2.0, 3.9
Address Latch
Data Address<12>
12
Access
BSR
FSR0
FSR1
FSR2
FSR1
FSR2
inc/dec
logic
Address
4
12
4
PCH PCL
PCLATH
8
31 Level Stack
Program Counter
PRODL
PRODH
8 x 8 Multiply
8
BITOP
8
8
ALU<8>
Address Latch
Program Memory
(96 Kbytes)
Data Latch
20
8
8
Table Pointer<21>
inc/dec logic
21
8
Data Bus<8>
Table Latch
8
IR
12
3
PCLATU
PCU
Note 1:
See Table 1-3 for I/O port pin descriptions.
2:
BOR functionality is provided when the on-board voltage regulator is enabled.
EUSART1
Comparators
MSSP1
Timer2
Timer1
Timer3
Timer0
ECCP1
ADC
10-Bit
W
Instruction Bus <16>
STKPTR
Bank
8
State Machine
Control Signals
Control Signals
Decode
8
8
EUSART2
ECCP2
ROM Latch
ECCP3
MSSP2
CCP4
CCP5
PORTC
PORTD
PORTE
PORTF
PORTG
RA0:RA5
(1)
RC0:RC7
(1)
RD0:RD7
(1)
RE0:RE7
(1)
RF1:RF7
(1)
RG0:RG4
(1)
PORTB
RB0:RB7
(1)
Timer4
OSC1/CLKI
OSC2/CLKO
V
DD
,
Timing
Generation
V
SS
MCLR
Power-up
Timer
Oscillator
Start-up Timer
Power-on
Reset
Watchdog
Timer
Brown-out
Reset
(2)
Precision
Reference
Band Gap
INTRC
Oscillator
Regulator
Voltage
V
DDCORE
/V
CAP
ENVREG
Kbytes)