Microchip Technology IC PIC MCU PIC18F65J15-I/PT TQFP-64 MCP PIC18F65J15-I/PT Data Sheet
Product codes
PIC18F65J15-I/PT
PIC18F87J10 FAMILY
DS39663F-page 6
© 2009 Microchip Technology Inc.
1.1.6
EASY MIGRATION
Regardless of the memory size, all devices share the
same rich set of peripherals, allowing for a smooth
migration path as applications grow and evolve.
The consistent pinout scheme used throughout the
entire family also aids in migrating to the next larger
device. This is true when moving between the 64-pin
members, between the 80-pin members, or even
jumping from 64-pin to 80-pin devices.
The PIC18F87J10 family is also pin compatible with
other PIC18 families, such as the PIC18F8720 and
PIC18F8722. This allows a new dimension to the
evolution of applications, allowing developers to select
different price points within Microchip’s PIC18 portfolio,
while maintaining the same feature set.
same rich set of peripherals, allowing for a smooth
migration path as applications grow and evolve.
The consistent pinout scheme used throughout the
entire family also aids in migrating to the next larger
device. This is true when moving between the 64-pin
members, between the 80-pin members, or even
jumping from 64-pin to 80-pin devices.
The PIC18F87J10 family is also pin compatible with
other PIC18 families, such as the PIC18F8720 and
PIC18F8722. This allows a new dimension to the
evolution of applications, allowing developers to select
different price points within Microchip’s PIC18 portfolio,
while maintaining the same feature set.
1.2
Other Special Features
• Communications: The PIC18F87J10 family
incorporates a range of serial communication
peripherals, including 2 independent Enhanced
USARTs and 2 Master SSP modules, capable of
both SPI and I
peripherals, including 2 independent Enhanced
USARTs and 2 Master SSP modules, capable of
both SPI and I
2
C™ (Master and Slave) modes of
operation. In addition, one of the general purpose
I/O ports can be reconfigured as an 8-bit Parallel
Slave Port for direct processor-to-processor
communications.
I/O ports can be reconfigured as an 8-bit Parallel
Slave Port for direct processor-to-processor
communications.
• CCP Modules: All devices in the family incorporate
two Capture/Compare/PWM (CCP) modules and
three Enhanced CCP modules to maximize
flexibility in control applications. Up to four different
time bases may be used to perform several
different operations at once. Each of the three
ECCPs offers up to four PWM outputs, allowing for
a total of 12 PWMs. The ECCPs also offer many
beneficial features, including polarity selection,
programmable dead time, auto-shutdown and
restart and Half-Bridge and Full-Bridge Output
modes.
three Enhanced CCP modules to maximize
flexibility in control applications. Up to four different
time bases may be used to perform several
different operations at once. Each of the three
ECCPs offers up to four PWM outputs, allowing for
a total of 12 PWMs. The ECCPs also offer many
beneficial features, including polarity selection,
programmable dead time, auto-shutdown and
restart and Half-Bridge and Full-Bridge Output
modes.
• 10-Bit A/D Converter: This module incorporates
programmable acquisition time, allowing for a
channel to be selected and a conversion to be
initiated without waiting for a sampling period and
thus, reducing code overhead.
channel to be selected and a conversion to be
initiated without waiting for a sampling period and
thus, reducing code overhead.
• Extended Watchdog Timer (WDT): This
enhanced version incorporates a 16-bit prescaler,
allowing an extended time-out range that is stable
across operating voltage and temperature. See
Section 27.0 “Electrical Characteristics” for
time-out periods.
allowing an extended time-out range that is stable
across operating voltage and temperature. See
Section 27.0 “Electrical Characteristics” for
time-out periods.
1.3
Details on Individual Family
Members
Members
Devices in the PIC18F87J10 family are available in
64-pin and 80-pin packages. Block diagrams for the
two groups are shown in Figure 1-1 and Figure 1-2.
The devices are differentiated from each other in four
ways:
1.
64-pin and 80-pin packages. Block diagrams for the
two groups are shown in Figure 1-1 and Figure 1-2.
The devices are differentiated from each other in four
ways:
1.
Flash program memory (six sizes, ranging from
32 Kbytes for PIC18FX5J10 devices to
128 Kbytes for PIC18FX7J10).
32 Kbytes for PIC18FX5J10 devices to
128 Kbytes for PIC18FX7J10).
2.
Data RAM (2048 bytes for
PIC18FX5J10/X5J15/X6J10 devices, 3936
bytes for PIC18FX6J15/X7J10 devices).
PIC18FX5J10/X5J15/X6J10 devices, 3936
bytes for PIC18FX6J15/X7J10 devices).
3.
A/D channels (11 for 64-pin devices, 15 for
80-pin devices).
80-pin devices).
4.
I/O ports (7 bidirectional ports on 64-pin devices,
9 bidirectional ports on 80-pin devices).
9 bidirectional ports on 80-pin devices).
All other features for devices in this family are identical.
These are summarized in Table 1-1 and Table 1-2.
The pinouts for all devices are listed in Table 1-3 and
Table 1-4.
These are summarized in Table 1-1 and Table 1-2.
The pinouts for all devices are listed in Table 1-3 and
Table 1-4.