Microchip Technology IC PIC MCU PIC18F65J15-I/PT TQFP-64 MCP PIC18F65J15-I/PT Data Sheet

© 2009 Microchip Technology Inc.

DS39663F-page 115

             

R/W-0

R/W-0

U-0

U-0

R/W-0

U-0

R/W-0

R/W-0

OSCFIF

CMIF

—

—

BCL1IF

—

TMR3IF

CCP2IF

bit 7

bit 0

Legend:
R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

-n = Value at POR

‘1’ = Bit is set

‘0’ = Bit is cleared

x = Bit is unknown

bit 7

OSCFIF: Oscillator Fail Interrupt Flag bit
1 = Device oscillator failed, clock input has changed to INTRC (must be cleared in software)
0 = Device clock operating

bit 6

CMIF: Comparator Interrupt Flag bit
1 = Comparator input has changed (must be cleared in software)
0 = Comparator input has not changed

bit 5-4

Unimplemented: Read as ‘0’

bit 3

BCL1IF: Bus Collision Interrupt Flag bit (MSSP1 module)
1 = A bus collision occurred (must be cleared in software)
0 = No bus collision occurred

bit 2

Unimplemented: Read as ‘0’

bit 1

TMR3IF: TMR3 Overflow Interrupt Flag bit
1 = TMR3 register overflowed (must be cleared in software)
0 = TMR3 register did not overflow

bit 0

CCP2IF: ECCP2 Interrupt Flag bit
Capture mode: 
1 = A TMR1/TMR3 register capture occurred (must be cleared in software) 
0 = No TMR1/TMR3 register capture occurred 
Compare mode: 
1 = A TMR1/TMR3 register compare match occurred (must be cleared in software) 
0 = No TMR1 or TMR3 register compare match occurred
PWM mode:
Unused in this mode.