Microchip Technology IC PIC MCU PIC18F65J15-I/PT TQFP-64 MCP PIC18F65J15-I/PT Data Sheet
Product codes
PIC18F65J15-I/PT
© 2009 Microchip Technology Inc.
DS39663F-page 29
PIC18F87J10 FAMILY
2.4
Voltage Regulator Pins (ENVREG
and V
and V
CAP
/V
DDCORE
)
The on-chip voltage regulator enable pin, ENVREG,
must always be connected directly to either a supply
voltage or to ground. Tying ENVREG to V
must always be connected directly to either a supply
voltage or to ground. Tying ENVREG to V
DD
enables
the regulator, while tying it to ground disables the
regulator. Refer to Section 24.3 “On-Chip Voltage
Regulator” for details on connecting and using the
on-chip regulator.
When the regulator is enabled, a low-ESR (<5Ω)
capacitor is required on the V
regulator. Refer to Section 24.3 “On-Chip Voltage
Regulator” for details on connecting and using the
on-chip regulator.
When the regulator is enabled, a low-ESR (<5Ω)
capacitor is required on the V
CAP
/V
DDCORE
pin to
stabilize the voltage regulator output voltage. The
V
V
CAP
/V
DDCORE
pin must not be connected to V
DD
and
must use a capacitor of 10
μF connected to ground. The
type can be ceramic or tantalum. A suitable example is
the Murata GRM21BF50J106ZE01 (10
the Murata GRM21BF50J106ZE01 (10
μF, 6.3V) or
equivalent. Designers may use Figure 2-3 to evaluate
ESR equivalence of candidate devices.
It is recommended that the trace length not exceed
0.25 inch (6 mm). Refer to Section 27.0 “Electrical
Characteristics” for additional information.
When the regulator is disabled, the V
ESR equivalence of candidate devices.
It is recommended that the trace length not exceed
0.25 inch (6 mm). Refer to Section 27.0 “Electrical
Characteristics” for additional information.
When the regulator is disabled, the V
CAP
/V
DDCORE
pin
must be tied to a voltage supply at the V
DDCORE
level.
Refer to Section 27.0 “Electrical Characteristics” for
information on V
information on V
DD
and V
DDCORE
.
Note that the “LF” versions of some low pin count
PIC18FJ parts (e.g., the PIC18LF45J10) do not have
the ENVREG pin. These devices are provided with the
voltage regulator permanently disabled; they must
always be provided with a supply voltage on the
V
PIC18FJ parts (e.g., the PIC18LF45J10) do not have
the ENVREG pin. These devices are provided with the
voltage regulator permanently disabled; they must
always be provided with a supply voltage on the
V
DDCORE
pin.
FIGURE 2-3:
FREQUENCY vs. ESR
PERFORMANCE FOR
SUGGESTED V
PERFORMANCE FOR
SUGGESTED V
CAP
2.5
ICSP Pins
The PGC and PGD pins are used for In-Circuit Serial
Programming (ICSP) and debugging purposes. It is
recommended to keep the trace length between the
ICSP connector and the ICSP pins on the device as
short as possible. If the ICSP connector is expected to
experience an ESD event, a series resistor is recom-
mended, with the value in the range of a few tens of
ohms, not to exceed 100Ω.
Pull-up resistors, series diodes and capacitors on the
PGC and PGD pins are not recommended as they will
interfere with the programmer/debugger com-
munications to the device. If such discrete components
are an application requirement, they should be removed
from the circuit during programming and debugging.
Alternatively, refer to the AC/DC characteristics and
timing requirements information in the respective device
Flash programming specification for information on
capacitive loading limits and pin input voltage high (V
Programming (ICSP) and debugging purposes. It is
recommended to keep the trace length between the
ICSP connector and the ICSP pins on the device as
short as possible. If the ICSP connector is expected to
experience an ESD event, a series resistor is recom-
mended, with the value in the range of a few tens of
ohms, not to exceed 100Ω.
Pull-up resistors, series diodes and capacitors on the
PGC and PGD pins are not recommended as they will
interfere with the programmer/debugger com-
munications to the device. If such discrete components
are an application requirement, they should be removed
from the circuit during programming and debugging.
Alternatively, refer to the AC/DC characteristics and
timing requirements information in the respective device
Flash programming specification for information on
capacitive loading limits and pin input voltage high (V
IH
)
and input low (V
IL
) requirements.
For device emulation, ensure that the “Communication
Channel Select” (i.e., PGC/PGD pins) programmed
into the device matches the physical connections for
the ICSP to the MPLAB
Channel Select” (i.e., PGC/PGD pins) programmed
into the device matches the physical connections for
the ICSP to the MPLAB
®
ICD 2, MPLAB ICD 3 or
REAL ICE™ emulator.
For more information on the ICD 2, ICD 3 and REAL ICE
emulator connection requirements, refer to the following
documents that are available on the Microchip web site.
• “MPLAB
For more information on the ICD 2, ICD 3 and REAL ICE
emulator connection requirements, refer to the following
documents that are available on the Microchip web site.
• “MPLAB
®
ICD 2 In-Circuit Debugger User’s
Guide” (DS51331)
• “Using MPLAB
®
ICD 2” (poster) (DS51265)
• “MPLAB
®
ICD 2 Design Advisory” (DS51566)
• “Using MPLAB
®
ICD 3” (poster) (DS51765)
• “MPLAB
®
ICD 3 Design Advisory” (DS51764)
• “MPLAB
®
REAL ICE™ In-Circuit Emulator User’s
Guide” (DS51616)
• “Using MPLAB
®
REAL ICE™ In-Circuit Emulator”
(poster) (DS51749)
10
1
0.1
0.01
0.001
0.01
0.1
1
10
100
1000 10,000
Frequency (MHz)
ES
R
(
Ω
)
Note:
Data for Murata GRM21BF50J106ZE01 shown.
Measurements at 25°C, 0V DC bias.
Measurements at 25°C, 0V DC bias.