Microchip Technology IC PIC MCU PIC18F65J15-I/PT TQFP-64 MCP PIC18F65J15-I/PT Data Sheet
Product codes
PIC18F65J15-I/PT
© 2009 Microchip Technology Inc.
DS39663F-page 5
PIC18F87J10 FAMILY
1.0
DEVICE OVERVIEW
This document contains device specific information for
the following devices:
the following devices:
This family introduces a new line of low-voltage devices
with the main traditional advantage of all PIC18 micro-
controllers – namely, high computational performance
and a rich feature set – at an extremely competitive
price point. These features make the PIC18F87J10
family a logical choice for many high-performance
applications where cost is a primary consideration.
with the main traditional advantage of all PIC18 micro-
controllers – namely, high computational performance
and a rich feature set – at an extremely competitive
price point. These features make the PIC18F87J10
family a logical choice for many high-performance
applications where cost is a primary consideration.
1.1
Core Features
1.1.1
nanoWatt TECHNOLOGY
All of the devices in the PIC18F87J10 family incorporate
a range of features that can significantly reduce power
consumption during operation. Key items include:
• Alternate Run Modes: By clocking the controller
a range of features that can significantly reduce power
consumption during operation. Key items include:
• Alternate Run Modes: By clocking the controller
from the Timer1 source or the internal RC oscilla-
tor, power consumption during code execution
can be reduced by as much as 90%.
tor, power consumption during code execution
can be reduced by as much as 90%.
• Multiple Idle Modes: The controller can also run
with its CPU core disabled but the peripherals still
active. In these states, power consumption can be
reduced even further, to as little as 4% of normal
operation requirements.
active. In these states, power consumption can be
reduced even further, to as little as 4% of normal
operation requirements.
• On-the-Fly Mode Switching: The
power-managed modes are invoked by user code
during operation, allowing the user to incorporate
power-saving ideas into their application’s
software design.
during operation, allowing the user to incorporate
power-saving ideas into their application’s
software design.
1.1.2
OSCILLATOR OPTIONS AND
FEATURES
FEATURES
All of the devices in the PIC18F87J10 family offer five
different oscillator options, allowing users a range of
choices in developing application hardware. These
include:
• Two Crystal modes, using crystals or ceramic
different oscillator options, allowing users a range of
choices in developing application hardware. These
include:
• Two Crystal modes, using crystals or ceramic
resonators.
• Two External Clock modes, offering the option of
a divide-by-4 clock output.
• A Phase Lock Loop (PLL) frequency multiplier,
available to the external oscillator modes which
allows clock speeds of up to 40 MHz.
allows clock speeds of up to 40 MHz.
• An internal RC oscillator with a fixed 31-kHz
output which provides an extremely low-power
option for timing-insensitive applications.
option for timing-insensitive applications.
The internal oscillator block provides a stable reference
source that gives the family additional features for
robust operation:
• Fail-Safe Clock Monitor: This option constantly
source that gives the family additional features for
robust operation:
• Fail-Safe Clock Monitor: This option constantly
monitors the main clock source against a reference
signal provided by the internal oscillator. If a clock
failure occurs, the controller is switched to the
internal oscillator, allowing for continued low-speed
operation or a safe application shutdown.
signal provided by the internal oscillator. If a clock
failure occurs, the controller is switched to the
internal oscillator, allowing for continued low-speed
operation or a safe application shutdown.
• Two-Speed Start-up: This option allows the
internal oscillator to serve as the clock source
from Power-on Reset, or wake-up from Sleep
mode, until the primary clock source is available.
from Power-on Reset, or wake-up from Sleep
mode, until the primary clock source is available.
1.1.3
EXPANDED MEMORY
The PIC18F87J10 family provides ample room for
application code, from 32 Kbytes to 128 Kbytes of code
space. The Flash cells for program memory are rated
to last up to 100 erase/write cycles. The PIC18F87J10
family also provides plenty of room for dynamic
application data, with up to 3936 bytes of data RAM.
application code, from 32 Kbytes to 128 Kbytes of code
space. The Flash cells for program memory are rated
to last up to 100 erase/write cycles. The PIC18F87J10
family also provides plenty of room for dynamic
application data, with up to 3936 bytes of data RAM.
1.1.4
EXTERNAL MEMORY BUS
In the unlikely event that 128 Kbytes of memory are
inadequate for an application, the 80-pin members of
the PIC18F87J10 family also implement an external
memory bus. This allows the controller’s internal
program counter to address a memory space of up to
2 Mbytes, permitting a level of data access that few
8-bit devices can claim. This allows additional memory
options, including:
• Using combinations of on-chip and external
inadequate for an application, the 80-pin members of
the PIC18F87J10 family also implement an external
memory bus. This allows the controller’s internal
program counter to address a memory space of up to
2 Mbytes, permitting a level of data access that few
8-bit devices can claim. This allows additional memory
options, including:
• Using combinations of on-chip and external
memory up to the 2-Mbyte limit
• Using external Flash memory for reprogrammable
application code or large data tables
• Using external RAM devices for storing large
amounts of variable data
1.1.5
EXTENDED INSTRUCTION SET
The PIC18F87J10 family implements the optional
extension to the PIC18 instruction set, adding 8 new
instructions and an Indexed Addressing mode.
Enabled as a device configuration option, the extension
has been specifically designed to optimize re-entrant
application code originally developed in high-level
languages, such as ‘C’.
extension to the PIC18 instruction set, adding 8 new
instructions and an Indexed Addressing mode.
Enabled as a device configuration option, the extension
has been specifically designed to optimize re-entrant
application code originally developed in high-level
languages, such as ‘C’.
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