Microchip Technology AC164139 Data Sheet
PIC24FJ256DA210 FAMILY
DS39969B-page 152
2010 Microchip Technology Inc.
8.6
Reference Clock Output
In addition to the CLKO output (F
OSC
/2) available in
certain oscillator modes, the device clock in the
PIC24FJ256DA210 family devices can also be config-
ured to provide a reference clock output signal to a port
pin. This feature is available in all oscillator configura-
tions and allows the user to select a greater range of
clock submultiples to drive external devices in the
application.
This reference clock output is controlled by the
REFOCON register (Register 8-5). Setting the ROEN
bit (REFOCON<15>) makes the clock signal available
on the REFO pin. The RODIV bits (REFOCON<11:8>)
enable the selection of 16 different clock divider
options.
PIC24FJ256DA210 family devices can also be config-
ured to provide a reference clock output signal to a port
pin. This feature is available in all oscillator configura-
tions and allows the user to select a greater range of
clock submultiples to drive external devices in the
application.
This reference clock output is controlled by the
REFOCON register (Register 8-5). Setting the ROEN
bit (REFOCON<15>) makes the clock signal available
on the REFO pin. The RODIV bits (REFOCON<11:8>)
enable the selection of 16 different clock divider
options.
The ROSSLP and ROSEL bits (REFOCON<13:12>)
control the availability of the reference output during
Sleep mode. The ROSEL bit determines if the oscillator
on OSCI and OSCO, or the current system clock
source, is used for the reference clock output. The
ROSSLP bit determines if the reference source is
available on REFO when the device is in Sleep mode.
To use the reference clock output in Sleep mode, both
the ROSSLP and ROSEL bits must be set. The device
clock must also be configured for one of the primary
modes (EC, HS or XT); otherwise, if the POSCEN bit is
not also set, the oscillator on OSCI and OSCO will be
powered down when the device enters Sleep mode.
Clearing the ROSEL bit allows the reference output
frequency to change as the system clock changes
during any clock switches.
control the availability of the reference output during
Sleep mode. The ROSEL bit determines if the oscillator
on OSCI and OSCO, or the current system clock
source, is used for the reference clock output. The
ROSSLP bit determines if the reference source is
available on REFO when the device is in Sleep mode.
To use the reference clock output in Sleep mode, both
the ROSSLP and ROSEL bits must be set. The device
clock must also be configured for one of the primary
modes (EC, HS or XT); otherwise, if the POSCEN bit is
not also set, the oscillator on OSCI and OSCO will be
powered down when the device enters Sleep mode.
Clearing the ROSEL bit allows the reference output
frequency to change as the system clock changes
during any clock switches.
TABLE 8-4:
DISPLAY MODULE CLOCK FREQUENCY DIVISION
GCLKDIV<6:0>
Frequency Divisor
Display Module Clock Frequency
96 MHz Input (48 MHz Input)
0000000
1
96 MHz (48 MHz)
0000001
1.25 (start incrementing by 0.25)
76.80 MHz (38.4 MHz)
0000010
1.5
64 MHz (32 MHz)
…
…
…
0111111
16.75
5.73 MHz (2.86 MHz)
1000000
17
5.65 MHz (2.82 MHz)
1000001
17.5 (start incrementing by 0.5)
5.49 MHz (2.74 MHz)
1000010
18
5.33 MHz (2.66 MHz)
…
…
…
1011111
32.5
2.95 MHz (1.47 MHz)
1100000
33
2.91 MHz (1.45 MHz)
1100001
34 (start incrementing by 1)
2.82 MHz (1.41 MHz)
1100010
35
2.74 MHz (1.37 MHz)
…
…
…
1111110
63
1.52 MHz (762 kHz)
1111111
64
1.50 MHz (750 kHz)