Microchip Technology MA330025-1 Data Sheet
dsPIC33EPXXX(GP/MC/MU)806/810/814 and PIC24EPXXX(GP/GU)810/814
DS70616G-page 182
2009-2012 Microchip Technology Inc.
9.3
Oscillator Control Registers
REGISTER 9-1:
OSCCON: OSCILLATOR CONTROL REGISTER
,
)
U-0
R-0
R-0
R-0
U-0
R/W-y
R/W-y
R/W-y
—
COSC<2:0>
—
NOSC<2:0>
(
)
bit 15
bit 8
R/W-0
R/W-0
R-0
U-0
R/C-0
U-0
R/W-0
R/W-0
CLKLOCK
IOLOCK
LOCK
—
CF
—
LPOSCEN
OSWEN
bit 7
bit 0
Legend:
y = Value Set from Configuration bits on POR
C = Clearable bit
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 15
Unimplemented: Read as ‘0’
bit 14-12
COSC<2:0>: Current Oscillator Selection bits (read-only)
111 = Fast RC Oscillator (FRC) with Divide-by-N
110 = Fast RC Oscillator (FRC) with Divide-by-16
101 = Low-Power RC Oscillator (LPRC)
100 = Secondary Oscillator (SOSC)
011 = Primary Oscillator (XT, HS, EC) with PLL
010 = Primary Oscillator (XT, HS, EC)
001 = Fast RC Oscillator (FRC) with Divide-by-N and PLL
000 = Fast RC Oscillator (FRC)
111 = Fast RC Oscillator (FRC) with Divide-by-N
110 = Fast RC Oscillator (FRC) with Divide-by-16
101 = Low-Power RC Oscillator (LPRC)
100 = Secondary Oscillator (SOSC)
011 = Primary Oscillator (XT, HS, EC) with PLL
010 = Primary Oscillator (XT, HS, EC)
001 = Fast RC Oscillator (FRC) with Divide-by-N and PLL
000 = Fast RC Oscillator (FRC)
bit 11
Unimplemented: Read as ‘0’
bit 10-8
NOSC<2:0>: New Oscillator Selection bits
(
)
111 = Fast RC Oscillator (FRC) with Divide-by-N
110 = Fast RC Oscillator (FRC) with Divide-by-16
101 = Low-Power RC Oscillator (LPRC)
100 = Secondary Oscillator (SOSC)
011 = Primary Oscillator (XT, HS, EC) with PLL
010 = Primary Oscillator (XT, HS, EC)
001 = Fast RC Oscillator (FRC) with Divide-by-N and PLL
000 = Fast RC Oscillator (FRC)
110 = Fast RC Oscillator (FRC) with Divide-by-16
101 = Low-Power RC Oscillator (LPRC)
100 = Secondary Oscillator (SOSC)
011 = Primary Oscillator (XT, HS, EC) with PLL
010 = Primary Oscillator (XT, HS, EC)
001 = Fast RC Oscillator (FRC) with Divide-by-N and PLL
000 = Fast RC Oscillator (FRC)
bit 7
CLKLOCK: Clock Lock Enable bit
1 = If (FCKSM0 = 1), then clock and PLL configurations are locked
1 = If (FCKSM0 = 1), then clock and PLL configurations are locked
If (FCKSM0 = 0), then clock and PLL configurations may be modified
0 = Clock and PLL selections are not locked, configurations may be modified
bit 6
IOLOCK: I/O Lock Enable bit
1 = I/O lock is active
0 = I/O lock is not active
1 = I/O lock is active
0 = I/O lock is not active
bit 5
LOCK: PLL Lock Status bit (read-only)
1 = Indicates that PLL is in lock or PLL start-up timer is satisfied
0 = Indicates that PLL is out of lock, start-up timer is in progress or PLL is disabled
1 = Indicates that PLL is in lock or PLL start-up timer is satisfied
0 = Indicates that PLL is out of lock, start-up timer is in progress or PLL is disabled
bit 4
Unimplemented: Read as ‘0’
Note 1: Writes to this register require an unlock sequence. Refer to Section 7. “Oscillator” (DS70580) in the
“dsPIC33E/PIC24E Family Reference Manual” (available from the Microchip web site) for details.
2: Direct clock switches between any Primary Oscillator mode with PLL and FRCPLL mode are not permit-
ted. This applies to clock switches in either direction. In these instances, the application must switch to
FRC mode as a transition clock source between the two PLL modes.
FRC mode as a transition clock source between the two PLL modes.
3: This register resets only on a Power-on Reset (POR).