Microchip Technology MA330025-1 Data Sheet
dsPIC33EPXXX(GP/MC/MU)806/810/814 and PIC24EPXXX(GP/GU)810/814
DS70616G-page 208
2009-2012 Microchip Technology Inc.
FIGURE 11-1:
BLOCK DIAGRAM OF A TYPICAL SHARED PORT STRUCTURE
Q
D
CK
WR LAT +
TRIS Latch
I/O Pin
WR Port
Data Bus
Q
D
CK
Data Latch
Read Port
Read TRIS
1
0
1
0
WR TRIS
Peripheral Output Data
Output Enable
Peripheral Input Data
I/O
Peripheral Module
Peripheral Output Enable
PIO Module
Output Multiplexers
Output Data
Input Data
Peripheral Module Enable
Read LAT