Microchip Technology MA330025-1 Data Sheet

DS70616G-page 284

 2009-2012 Microchip Technology Inc.

U-0

U-0

U-0

U-0

U-0

U-0

U-0

R/W-0

—

—

—

—

—

—

—

IC32

bit 15

bit 8

R/W-0

R/W/HS-0

U-0

R/W-0

R/W-1

R/W-1

R/W-0

R/W-1

ICTRIG

TRIGSTAT

—

SYNCSEL<4:0>

bit 7

bit 0

Legend:
R = Readable bit

HS = Set by Hardware

‘0’ = Bit is cleared

-n = Value at POR

W = Writable bit

U = Unimplemented bit, read as ‘0’

bit 15-9 

Unimplemented: Read as ‘0’

bit 8

IC32: 32-Bit Timer Mode Select bit (Cascade mode)
1 = ODD IC and EVEN IC form a single 32-bit input capture module

0 = Cascade module operation is disabled

bit 7

ICTRIG: Trigger Operation Select bit

1 = Input source is used to trigger the input capture timer (Trigger mode)
0 = Input source is used to synchronize the input capture timer to a timer of another module 

(Synchronization mode)

bit 6

TRIGSTAT: Timer Trigger Status bit

1 = ICxTMR has been triggered and is running
0 = ICxTMR has not been triggered and is being held clear

bit 5 

Unimplemented: Read as ‘0’

Note 1: The IC32 bit in both the ODD and EVEN IC must be set to enable Cascade mode.

2: The input source is selected by the SYNCSEL<4:0> bits of the ICxCON2 register.
3: This bit is set by the selected input source (selected by the SYNCSEL<4:0> bits); it can be read, set and 

cleared in software.

4: Do not use the ICx module as its own Sync or Trigger source.
5: This option should only be selected as a trigger source and not as a synchronization source.