Microchip Technology MA330025-1 Data Sheet
2009-2012 Microchip Technology Inc.
DS70616G-page 287
dsPIC33EPXXX(GP/MC/MU)806/810/814 and PIC24EPXXX(GP/GU)810/814
15.0 OUTPUT COMPARE
The output compare module can select one of eight
available clock sources for its time base. The module
compares the value of the timer with the value of one or
two Compare registers, depending on the operating
mode selected. The state of the output pin changes
when the timer value matches the Compare register
value. The output compare module generates either a
single output pulse, or a sequence of output pulses, by
changing the state of the output pin on the compare
match events. The output compare module can also
generate interrupts on compare match events.
available clock sources for its time base. The module
compares the value of the timer with the value of one or
two Compare registers, depending on the operating
mode selected. The state of the output pin changes
when the timer value matches the Compare register
value. The output compare module generates either a
single output pulse, or a sequence of output pulses, by
changing the state of the output pin on the compare
match events. The output compare module can also
generate interrupts on compare match events.
FIGURE 15-1:
OUTPUT COMPARE MODULE BLOCK DIAGRAM
Note 1: This data sheet summarizes the features
of the dsPIC33EPXXX(GP/MC/MU)806/
810/814 and PIC24EPXXX(GP/GU)810/
814 families of devices. It is not intended
to be a comprehensive reference source.
To complement the information in this
data sheet, refer to Section 13. “Output
Compare” (DS70358) of the “dsPIC33E/
PIC24E Family Reference Manual”,
which is available from the Microchip web
site (
810/814 and PIC24EPXXX(GP/GU)810/
814 families of devices. It is not intended
to be a comprehensive reference source.
To complement the information in this
data sheet, refer to Section 13. “Output
Compare” (DS70358) of the “dsPIC33E/
PIC24E Family Reference Manual”,
which is available from the Microchip web
site (
www.microchip.com
).
2: Some registers and associated bits
described in this section may not be
available on all devices. Refer to
available on all devices. Refer to
in
this data sheet for device-specific register
and bit information.
and bit information.
Note 1: Only OC1, OC2, OC3 and OC4 can trigger
a DMA data transfer.
2: See Section 13. “Output Compare”
(DS70358) in the “dsPIC33E/PIC24E
Family Reference Manual” for OCxR and
OCxRS register restrictions.
Family Reference Manual” for OCxR and
OCxRS register restrictions.
OCxR Buffer
Comparator
OCxTMR
OCxCON1
OCxCON2
OC Output and
OCx Interrupt
OCx Pin
OCxRS Buffer
Comparator
Fault Logic
Match
Match
Trigger and
Sync Logic
Clock
Select
Increment
Reset
Trigger and
Sync Sources
Sync Sources
Reset
Match Event
OCFA
OCxR
OCxRS
Event
Event
Rollover
Rollover/Reset
Rollover/Reset
OCx Synchronization/Trigger Event
OCFB
OCFC
SYNCSEL<4:0>
Trigger
Trigger
(1)
Note 1:
The Trigger/Sync source is enabled by default and is set to Timer2 as a source. This timer must be enabled for
proper OCx module operation or the Trigger/Sync source must be changed to another source option.
proper OCx module operation or the Trigger/Sync source must be changed to another source option.
F
P
T1CLK
T5CLK