Microchip Technology MA330025-1 Data Sheet
2009-2012 Microchip Technology Inc.
DS70616G-page 337
dsPIC33EPXXX(GP/MC/MU)806/810/814 and PIC24EPXXX(GP/GU)810/814
18.0 SERIAL PERIPHERAL
INTERFACE (SPI)
The SPI module is a synchronous serial interface use-
ful for communicating with other peripheral or micro-
controller devices. These peripheral devices can be
serial EEPROMs, shift registers, display drivers, ADC
Converters, etc. The SPI module is compatible with the
Motorola
ful for communicating with other peripheral or micro-
controller devices. These peripheral devices can be
serial EEPROMs, shift registers, display drivers, ADC
Converters, etc. The SPI module is compatible with the
Motorola
®
SPI and SIOP interfaces.
Four SPI modules are provided on a single device.
These modules, which are designated as SPI1, SPI2,
SPI3 and SPI4, are functionally identical with the excep-
tion that SPI2 is not remappable. The dedicated SDI2,
SDO2 and SCK2 connections provide improved perfor-
mance over SPI1, SPI3 and SPI4 (see
These modules, which are designated as SPI1, SPI2,
SPI3 and SPI4, are functionally identical with the excep-
tion that SPI2 is not remappable. The dedicated SDI2,
SDO2 and SCK2 connections provide improved perfor-
mance over SPI1, SPI3 and SPI4 (see
). Each SPI module
includes an eight-word FIFO buffer and allows DMA bus
connections. When using the SPI module with DMA,
FIFO operation can be disabled.
connections. When using the SPI module with DMA,
FIFO operation can be disabled.
The SPIx serial interface consists of four pins, as
follows:
• SDIx: Serial Data Input
• SDOx: Serial Data Output
• SCKx: Shift Clock Input or Output
• SSx/FSYNCx: Active-Low Slave Select or Frame
follows:
• SDIx: Serial Data Input
• SDOx: Serial Data Output
• SCKx: Shift Clock Input or Output
• SSx/FSYNCx: Active-Low Slave Select or Frame
Synchronization I/O Pulse
The SPIx module can be configured to operate with
two, three or four pins. In 3-pin mode, SSx is not used.
In 2-pin mode, neither SDOx nor SSx is used.
two, three or four pins. In 3-pin mode, SSx is not used.
In 2-pin mode, neither SDOx nor SSx is used.
illustrates the block diagram of the SPI
module in Standard and Enhanced modes.
FIGURE 18-1:
SPIx MODULE BLOCK DIAGRAM
Note 1: This data sheet summarizes the features
of the dsPIC33EPXXX(GP/MC/MU)806/
810/814 and PIC24EPXXX(GP/GU)810/
814 families of devices. It is not intended
to be a comprehensive reference source.
To complement the information in this
data sheet, refer to Section 18. “Serial
Peripheral Interface (SPI)” (DS70569)
of the “dsPIC33E/PIC24E Family
Reference Manual”, which is available
from the Microchip web site
(
810/814 and PIC24EPXXX(GP/GU)810/
814 families of devices. It is not intended
to be a comprehensive reference source.
To complement the information in this
data sheet, refer to Section 18. “Serial
Peripheral Interface (SPI)” (DS70569)
of the “dsPIC33E/PIC24E Family
Reference Manual”, which is available
from the Microchip web site
(
www.microchip.com
).
2: Some registers and associated bits
described in this section may not be
available on all devices. Refer to
available on all devices. Refer to
in
this data sheet for device-specific register
and bit information.
and bit information.
Note:
In this section, the SPI modules are
referred to together as SPIx, or separately
as SPI1, SPI2, SPI3 and SPI4. Special
Function Registers follow a similar nota-
tion. For example, SPIxCON refers to the
control register for the SPI1, SPI2, SPI3
or SPI4 module.
referred to together as SPIx, or separately
as SPI1, SPI2, SPI3 and SPI4. Special
Function Registers follow a similar nota-
tion. For example, SPIxCON refers to the
control register for the SPI1, SPI2, SPI3
or SPI4 module.
Internal Data Bus
SDIx
SDOx
SSx/FSYNCx
SCKx
bit 0
Shift Control
Edge
Select
F
P
Enable
Sync
Control
Transfer
Transfer
Write SPIxBUF
Read SPIxBUF
16
SPIxCON1<1:0>
SPIxCON1<4:2>
Master Clock
Note 1: In Standard mode, the FIFO is only one level deep.
Clock
Control
SPIxSR
8-Level FIFO
Transmit Buffer
(
8-Level FIFO
Receive Buffer
(
SPIxBUF
Primary
1:1/4/16/64
Prescaler
Secondary
Prescaler
1:1 to 1:8