Microchip Technology MA330025-1 Data Sheet

 2009-2012 Microchip Technology Inc.

DS70616G-page 503

Standard Operating Conditions: 3.0V to 3.6V
(unless otherwise stated)
Operating temperature

-40°C 

  T

A

 

  +85°C for Industrial

-40°C 

  T

A

 

  +125°C for Extended

DC40d

6

10

mA

-40°C

3.3V

10 MIPS

DC40a

7

12

mA

+25°C

DC40b

8

13

mA

+85°C

DC40c

9

15

mA

+125°C

DC42d

11

18

mA

-40°C

3.3V

20 MIPS

DC42a

12

20

mA

+25°C

DC42b

13

21

mA

+85°C

DC42c

15

24

mA

+125°C

DC44d

23

37

mA

-40°C

3.3V

40 MIPS

DC44a

24

39

mA

+25°C

DC44b

25

40

mA

+85°C

DC44c

27

44

mA

+125°C

DC45d

34

55

mA

-40°C

3.3V

60 MIPS

DC45a

35

56

mA

+25°C

DC45b

36

58

mA

+85°C

DC45c

38

61

mA

+125°C

DC46d

39

63

mA

-40°C

3.3V

70 MIPS

DC46a

41

66

mA

+25°C

DC46b

42

68

mA

+85°C

Note 1: Base I

IDLE

 current is measured as follows:

• CPU core is off, oscillator is configured in EC mode and external clock is active, OSC1 is driven with 

external square wave from rail-to-rail (EC Clock Overshoot/Undershoot < 250 mV required)

• CLKO is configured as an I/O input pin in the Configuration Word
• External Secondary Oscillator (SOSC) is disabled (i.e., SOSCO and SOSCI pins are configured as 

digital I/O inputs)

• All I/O pins are configured as inputs and pulled to V

SS

• MCLR = V

DD

, WDT and FSCM are disabled

• No peripheral modules are operating; however, every peripheral is being clocked (defined PMDx bits 

are set to zero and unimplemented PMDx bits are set to one)

• The NVMSIDL bit (NVMCON<12>) = 1 (i.e., Flash regulator is set to stand-by while the device is in 

Idle mode)

• JTAG is disabled

2: These parameters are characterized but not tested in manufacturing.
3: Data in “Typ” column is at 3.3V, +25ºC unless otherwise stated.