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Microchip Technology MA330024 Data Sheet

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dsPIC33FJ32GS406/606/608/610 and dsPIC33FJ64GS406/606/608/610
DS70000591F-page 118
 2009-2014 Microchip Technology Inc.
6.1
System Reset
The dsPIC33FJ32GS406/606/608/610 and
dsPIC33FJ64GS406/606/608/610 families of devices
have two types of Reset:
• Cold  Reset
• Warm  Reset
A Cold Reset is the result of a Power-on Reset (POR)
or a Brown-out Reset (BOR). On a Cold Reset, the
FNOSCx Configuration bits in the FOSC Configuration
register select the device clock source. 
A Warm Reset is the result of all the other Reset
sources, including the RESET instruction. On Warm
Reset, the device will continue to operate from the
current clock source as indicated by the Current
Oscillator Selection (COSC<2:0>) bits in the Oscillator
Control (OSCCON<14:12>) register. 
The device is kept in a Reset state until the system
power supplies have stabilized at appropriate levels
and the oscillator clock is ready. The sequence in
which this occurs is described in 
TABLE 6-1:
OSCILLATOR DELAY
Oscillator Mode
Oscillator 
Start-up Delay
Oscillator 
Start-up Timer
PLL Lock Time
Total Delay
FRC, FRCDIV16, FRCDIVN
T
OSCD
)
—
—
T
OSCD
FRCPLL
T
OSCD
)
—
T
LOCK
T
OSCD
 + T
LOCK
(
XT
T
OSCD
)
T
OST
)
—
T
OSCD
 + T
OST
,
)
HS
T
OSCD
)
T
OST
)
—
T
OSCD
 + T
OST
,
)
EC
—
—
—
—
XTPLL
T
OSCD
)
T
OST
)
T
LOCK
T
OSCD
 + T
OST
 + T
LOCK
HSPLL
T
OSCD
)
T
OST
)
T
LOCK
T
OSCD
 + T
OST
 + T
LOCK
ECPLL
—
—
T
LOCK
T
LOCK
(
)
LPRC
T
OSCD
)
—
—
T
OSCD
Note 1:
T
OSCD
 = Oscillator start-up delay (1.1
s max. for FRC, 70 s max. for LPRC). Crystal oscillator start-up 
times vary with the crystal characteristics, load capacitance, etc.
2:
T
OST
 = Oscillator Start-up Timer (OST) delay (1024 oscillator clock period). For example, T
OST
 = 102.4
s 
for a 10 MHz crystal and T
OST
= 32 ms for a 32 kHz crystal.
3:
T
LOCK
 = PLL lock time (1.5 ms nominal) if PLL is enabled.