Microchip Technology MA330024 Data Sheet
dsPIC33FJ32GS406/606/608/610 and dsPIC33FJ64GS406/606/608/610
DS70000591F-page 166
2009-2014 Microchip Technology Inc.
REGISTER 7-35:
IPC17: INTERRUPT PRIORITY CONTROL REGISTER 17
U-0
U-0
U-0
U-0
U-0
R/W-1
R/W-0
R/W-0
—
—
—
—
—
C1TXIP2
(
)
C1TXIP1
(
)
C1TXIP0
(
)
bit 15
bit 8
U-0
U-0
U-0
U-0
U-0
U-0
U-0
U-0
—
—
—
—
—
—
—
—
bit 7
bit 0
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 15-11
Unimplemented: Read as ‘0’
bit 10-8
C1TXIP<2:0>: ECAN1 Transmit Data Request Interrupt Priority bits
(
)
111
= Interrupt is Priority 7 (highest priority interrupt)
•
•
•
001
•
•
001
= Interrupt is Priority 1
000
= Interrupt source is disabled
bit 7-0
Unimplemented: Read as ‘0’
Note 1:
Interrupts are disabled on devices without ECAN™ modules.