Microchip Technology MA330016 Data Sheet
© 2007-2011 Microchip Technology Inc.
DS70290J-page 59
dsPIC33FJ32GP202/204 and dsPIC33FJ16GP304
5.5.1
PROGRAMMING ALGORITHM FOR
FLASH PROGRAM MEMORY
FLASH PROGRAM MEMORY
Programmers can program one row of program Flash
memory at a time. To do this, it is necessary to erase
the 8-row erase page that contains the desired row.
The general process is:
1.
memory at a time. To do this, it is necessary to erase
the 8-row erase page that contains the desired row.
The general process is:
1.
Read eight rows of program memory
(512 instructions) and store in data RAM.
(512 instructions) and store in data RAM.
2.
Update the program data in RAM with the
desired new data.
desired new data.
3.
Erase the block (see
):
a) Set the NVMOP bits (NVMCON<3:0>) to
‘0010’ to configure for block erase. Set the
ERASE bit (NVMCON<6>) and the WREN
bit (NVMCON<14>).
ERASE bit (NVMCON<6>) and the WREN
bit (NVMCON<14>).
b) Write the starting address of the page to be
erased into the TBLPAG and W registers.
c)
Write 0x55 to NVMKEY.
d) Write 0xAA to NVMKEY.
e) Set the WR bit (NVMCON<15>). The erase
e) Set the WR bit (NVMCON<15>). The erase
cycle begins and the CPU stalls for the
duration of the erase cycle. When the erase is
done, the WR bit is cleared automatically.
duration of the erase cycle. When the erase is
done, the WR bit is cleared automatically.
4.
).
5.
Write the program block to Flash memory:
a) Set the NVMOP bits to ‘0001’ to configure
a) Set the NVMOP bits to ‘0001’ to configure
for row programming. Clear the ERASE bit
and set the WREN bit.
and set the WREN bit.
b) Write 0x55 to NVMKEY.
c)
c)
Write 0xAA to NVMKEY.
d)
Set the WR bit. The programming cycle
begins and the CPU stalls for the duration of
the write cycle. When the write to Flash
memory is done, the WR bit is cleared
automatically.
begins and the CPU stalls for the duration of
the write cycle. When the write to Flash
memory is done, the WR bit is cleared
automatically.
6.
Repeat steps 4 and 5, using the next available
64 instructions from the block in data RAM by
incrementing the value in TBLPAG, until all
512 instructions are written back to Flash memory.
64 instructions from the block in data RAM by
incrementing the value in TBLPAG, until all
512 instructions are written back to Flash memory.
For protection against accidental operations, the write
initiate sequence for NVMKEY must be used to allow
any erase or program operation to proceed. After the
programming command has been executed, the user
application must wait for the programming time until
programming is complete. The two instructions
following the start of the programming sequence
should be NOPs, as shown in
initiate sequence for NVMKEY must be used to allow
any erase or program operation to proceed. After the
programming command has been executed, the user
application must wait for the programming time until
programming is complete. The two instructions
following the start of the programming sequence
should be NOPs, as shown in
EXAMPLE 5-1:
ERASING A PROGRAM MEMORY PAGE
; Set up NVMCON for block erase operation
MOV
#0x4042, W0
;
MOV
W0, NVMCON
; Initialize NVMCON
; Init pointer to row to be ERASED
MOV
#tblpage(PROG_ADDR), W0
;
MOV
W0, TBLPAG
; Initialize PM Page Boundary SFR
MOV
#tbloffset(PROG_ADDR), W0
; Initialize in-page EA[15:0] pointer
TBLWTL W0, [W0]
; Set base address of erase block
DISI
#5
; Block all interrupts with priority <7
; for next 5 instructions
; for next 5 instructions
MOV
#0x55, W0
MOV
W0, NVMKEY
; Write the 55 key
MOV #0xAA, W1
;
MOV
W1, NVMKEY
; Write the AA key
BSET
NVMCON, #WR
; Start the erase sequence
NOP
; Insert two NOPs after the erase
NOP
; command is asserted